psd813f2v STMicroelectronics, psd813f2v Datasheet - Page 82

• Manufacturer Part Number: psd813f2v
• Description: Flash In-system Programmable Isp Peripherals For8-bits Mcus, 3v
• Manufacturer: STMicroelectronics

PSD813F2V, PSD854F2V
Table 50. CPLD Macrocell Synchronous Clock Mode Timing (3V devices)
Note: 1. Fast Slew Rate output available on PA3-PA0, PB3-PB0, and PD2-PD0. Decrement times by given amount.
82/109
f
t
t
t
t
t
t
t
Symbol
MAX
S
H
CH
CL
CO
ARD
MIN
2. CLKIN (PD1) t
Maximum
Frequency
External Feedback
Maximum
Frequency
Internal Feedback
(f
Maximum
Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
Clock to Output
Delay
CPLD Array Delay
Minimum Clock
Period
CNT
Parameter
)
2
CLCL
= t
CH
+ t
CL
Any macrocell
.
1/(t
Conditions
Clock Input
Clock Input
Clock Input
1/(t
1/(t
t
S
CH
+t
CH
S
+t
+t
CO
+t
CL
CO
–10)
CL
)
)
Doc ID 10552 Rev 3
Min Max Min Max Min Max
20
15
10
25
0
-12
22.2
28.5
40.0
25
25
25
15
15
29
0
-15
18.8
23.2
33.3
28
29
30
16
16
32
0
-20
15.8
18.8
31.2
33
33
Aloc
+ 4
+ 4
PT
Turbo
+ 20
Off
Slew
rate
– 6
1
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns