aoz1056 Alpha & Omega Semiconductor, aoz1056 Datasheet - Page 10

• Manufacturer Part Number: aoz1056
• Description: Ezbucktm 2a Simple Buck Regulator
• Manufacturer: Alpha & Omega Semiconductor

where;
C
ESR
When a low ESR ceramic capacitor is used as the output
capacitor, the impedance of the capacitor at the switching
frequency dominates. Output ripple is mainly caused by
capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided
by capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire operating
temperature range, X5R or X7R dielectric type of ceramic,
or other low ESR tantalum are recommended to be used
as output capacitors.
In a buck converter, the output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak-to-peak inductor ripple current.
It can be calculated by:
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small
and inductor ripple current is high, output capacitor
could be overstressed.
Loop Compensation
The AOZ1056 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output L&C
filter. It greatly simplifies the compensation loop design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system in
frequency domain. The pole is dominant pole and can be
calculated by:
I
f
ΔV
ΔV
CO_RMS
O
P1
Rev. 1.2 September 2008
is output capacitor value, and
CO
O
O
=
is the Equivalent Series Resistor of output capacitor.
=
=
---------------------------------- -
2π
ΔI
ΔI
=
×
L
L
C
----------
×
×
ΔI
1
O
12
ESR
-------------------------
8
L
×
×
R
f C
1
×
CO
L
O
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The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
R
ESR
The compensation design is actually to shape the
converter close loop transfer function to get desired gain
and phase. Several different types of compensation
network can be used for the AOZ1056. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1056, FB pin and COMP pin are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
where;
G
A/V,
G
C
The zero given by the external compensation net-
work, capacitor C
(R
To design the compensation circuit, a target crossover
frequency f
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high due to system stability concern.
When designing the compensation loop, converter
stability under all line and load condition must be
considered.
f
f
f
P2
O
L
EA
VEA
C
Z2
Z1
1
is load resistor value, and
is compensation capacitor.
is the output filter capacitor,
in Figure 1), is located at:
CO
is the error amplifier transconductance, which is 200 x 10
=
=
=
is the error amplifier voltage gain, which is 500 V/V, and
is the equivalent series resistance of output capacitor.
------------------------------------------ -
2π
-----------------------------------
2π
------------------------------------------------
2π
C
×
×
×
for close loop must be selected. The system
C
C
C
G
1
C
C
O
EA
C
×
×
1
×
(C
R
G
ESR
C
VEA
5
in Figure 1) and resistor R
CO
AOZ1056
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