aoz1110 Alpha & Omega Semiconductor, aoz1110 Datasheet - Page 11

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aoz1110

Manufacturer Part Number
aoz1110
Description
4a Synchronous Ezbuck Regulator
Manufacturer
Alpha & Omega Semiconductor
Datasheet
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
R
ESR
The compensation design is actually to shape the
converter control loop transfer function to get desired
gain and phase. Several different types of compensation
network can be used for the AOZ1110QI. For most
cases, a series capacitor and resistor network connected
to the COMP pin sets the pole-zero and is adequate for a
stable high-bandwidth control loop.
In the AOZ1110QI, FB pin and COMP pin are the
inverting input and the output of internal error amplifier. A
series R and C compensation network connected to
COMP provides one pole and one zero. The pole is:
where;
G
200 x 10
G
and, C
The zero given by the external compensation network,
capacitor C
To design the compensation circuit, a target crossover
frequency f
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When
f
f
f
O
L
p2
EA
VEA
Z2
Z1
Rev. 1.0 October 2010
is load resistor value,
is the output filter capacitor,
CO
is the error amplifier transconductance, which is
=
=
=
is the error amplifier voltage gain, which is 500 V/V,
C
is the equivalent series resistance of output capacitor.
------------------------------------------ -
2π C
-6
is the compensation capacitor in Figure1.
-----------------------------------
------------------------------------------------
2π C
A/V,
C
×
C
×
×
for close loop must be selected. The system
and resistor R
C
G
1
C
C
O
EA
×
×
1
×
G
R
ESR
C
VEA
CO
C
, is located at:
www.aosmd.com
designing the compensation loop, converter stability
under all line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency. The
strategy for choosing R
frequency with Rc and set the compensator zero with C
Using selected crossover frequency, f
where;
f
set to be about 1/10 of switching frequency,
V
G
200 x 10
G
10 A/V.
The compensation capacitor C
make a zero. This zero is put somewhere close to the
dominate pole f
over frequency. C
The equation above can also be simplified to:
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
C
C
C
R
FB
EA
CS
is desired crossover frequency. For best performance, f
C
C
C
is 0.8V,
is the error amplifier transconductance, which is
is the current sense circuit transconductance, which is
=
=
=
-6
---------------------------------- -
C
---------------------
f
C
A/V;
O
×
R
×
×
C
--------- -
V
V
1.5
R
R
FB
O
p1
C
L
×
C
but lower than 1/5 of selected cross-
×
f
can is selected by:
----------------------------- -
G
p1
EA
c
and Cc is to set the cross over
×
×
C
G
O
CS
C
and resistor R
C
, to calculate R
Page 11 of 16
AOZ1110
C
together
C
is
C
C
:
.

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