W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 55

• Manufacturer Part Number: W83877
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

Bit 1, 2: These two bits are not implemented and are logic one during a read of the status register.
Bit 0: This bit is valid in EPP mode only. It indicates that a 10 S timeout has occurred on the EPP
5.2.3 Printer Control Latch and Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the printer
control swapper. Bit definitions are as follows:
Bit 7, 6: These two bits are a logic one during a read. They can be written.
Bit 5: Direction control bit
Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low to high.
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50 microsecond pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5 microsecond minimum high active pulse clocks data into the printer. Valid data must be
5.2.4 EPP Address Port
The address port is available only in EPP mode. Bit definitions are as follows:
present for a minimum of 0.5 microseconds before and after the strobe pulse.
bus. A logic 0 means that no time-out error has occurred; a logic 1 means that a time-out error
has been detected. Writing a logic 1 to this bit will clear the time-out status bit; writing a logic 0
has no effect.
W83757 (SPP) mode: When this bit is a logic 1, pin PRTOE is high, and PRTBEN (CR3 bit 7)
is low, the parallel port is in input mode (read); when this bit is a logic 0, the parallel port is in
output mode (write). This bit is write-only.
BPP mode: When this bit is a logic 1, the parallel port is in input mode (read); when it is a logic
0, the parallel port is in output mode (write). This bit can be read and written.
1
7
6
1
5
4
3
- 55 -
2
1
0
STROBE
AUTO FD
INIT
SLCT IN
IRQ ENABLE
DIR
Publication Release Date: January 1996
W83877F
Revision A2