W83877 Winbond Electronics Corp America, W83877 Datasheet - Page 68

• Manufacturer Part Number: W83877
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

The extension adapter can issue a DMA request by setting pin XDRQ high, thus sending the
W83877F output to the host system by pin PDRQX. The DMA controller should recognize the DMA
request and output a relative DACK to pin PDACKX of the W83877F, which will output the DACK
without any change from pin XDACK to the extension adapter. Once the DMA transfer is completed,
a terminal count (TC) should be issued from the DMA controller to pin TC of W83877F and output to
the extension adapter via pin XTC. XIRQ is the interrupt request of the extension adapter. The value
of XIRQ coming from the extension adapter will directly pass through pin IRQ7 to the host system.
XIRQ and IRQ7, XDACK and PDACKX
W83877F pins. Although these pins are defined as DMA and interrupt functions, they can be
redefined by users for other specific functions.
5.6.1 Operation
The idea behind EXTADP mode is to treat the parallel port DB-25 connector as an ISA slot, except
that its addresses are not issued to the extension adapter. The operation of EXTADP mode is
described below:
1. Set the W83877F to EXTADP mode by programming bit 7 of CR7 as low and bit 3 and bit 2 of CR0
2. The W83877F CR2 is an address register that records the address of the extension adapter. When
3. After the above two steps, every time the host system issues an IOR or IOW command, the
4. DMA operations are handled in the same way as item 3, except that the relevant PDACKX
5.7 Joystick Mode
The joystick mode allows users to plug a joystick into the parallel port DB-25 connector. The pin
definitions are shown in Table 5-1.
Pins NSTB
Pins PD5 and PD4 are the button input of the joystick.
Pins PD1 and PD0 are the X/Y axis paddle input of the joystick.
XDO-XD7 are the system data bus for the extension adapter.
XA0-XA2 are the system address bus.
access mode.
a DMA cycle.
as high and low, respectively.
the desired address is written into CR2, pins XWR and XRD of the W83877F will simultaneously
go low and the desired address will also appear on the printer data bus PD7-PD0. Users can
logically OR these two signals as an initial reset.
W83877F will compare the I/O address with the CR2 register. If the comparision matches, the
data, low bits addresses (XA2-XA0), and XWR
connector.
PDRQX will be active on the DB-25 connector.
XWR
XDACK
and XRD are the I/O read/write commands with address comparing match or in DMA
,
,
XTC
AFD
,
,
and XDRQ are used in conjunction with PDACKX , TC, and PDRQX to execute
NSLIN
(Patent pending)
,
and INIT output high as a voltage supply to the joystick.
,
and XDRQ and PDRQX are three input/output pairs of
- 68 -
/
XRD
will be presented on the parallel port DB-25
W83877F
,