at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 143

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

13.26.2
7734M–AVR–03/10
PSC2 Interrupt Mask Register – PIM2
• Bit 4 – POMV2B0: Output Matrix Output B Ramp 0
This bit gives the state of the PSCOUT21 (and/or PSCOUT23) during ramp 0
• Bit 3 – POMV2A3: Output Matrix Output A Ramp 3
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 3
• Bit 2 – POMV2A2: Output Matrix Output A Ramp 2
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 2
• Bit 1 – POMV2A1: Output Matrix Output A Ramp 1
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 1
• Bit 0 – POMV2A0: Output Matrix Output A Ramp 0
This bit gives the state of the PSCOUT20 (and/or PSCOUT22) during ramp 0
Bit
Read/Write
Initial Value
• Bit 5 – PSEIEn : PSC n Synchro Error Interrupt Enable
When this bit is set, the PSEIn bit (if set) generate an interrupt.
• Bit 4 – PEVEnB : PSC n External Event B Interrupt Enable
When this bit is set, an external event which can generates a capture from Retrigger/Fault block B gener-
ates also an interrupt.
• Bit 3 – PEVEnA : PSC n External Event A Interrupt Enable
When this bit is set, an external event which can generates a capture from Retrigger/Fault block A gener-
ates also an interrupt.
• Bit 1– PEOEPEn : PSC n End Of Enhanced Cycle Interrupt Enable
When this bit is set, an interrupt is generated when PSC reaches the end of the 15th PSC cycle. This
allows to update the PSC values in the interrupt routine and to start a new enhanced cycle with the new
values at the next PSC cycle end.
• Bit 0 – PEOPEn : PSC n End Of Cycle Interrupt Enable
When this bit is set, an interrupt is generated when PSC reaches the end of the whole cycle.
7
-
R
0
6
-
R
0
5
PSEIE2
R/W
0
4
PEVE2B
R/W
0
3
PEVE2A
R/W
0
2
-
R
0
1
PEOEPE2 PEOPE2
R/W
0
AT90PWM81
0
R/W
0
PIM2
143