at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 69

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

7734M–AVR–03/10
Figure 10-3.
Consider the clock period starting shortly after the first falling edge of the system clock. The latch is
closed when the clock is low, and goes transparent when the clock is high, as indicated by the shaded
region of the “SYNC LATCH” signal. The signal value is latched when the system clock goes low. It is
clocked into the PINxn Register at the succeeding positive clock edge. As indicated by the two arrows
t
period depending upon the time of assertion.
When reading back a software assigned pin value, a nop instruction must be inserted as indicated in
10-4. The out instruction sets the “SYNC LATCH” signal at the positive edge of the clock. In this case,
the delay t
Figure 10-4.
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and define the port
pins from 4 to 7 as input with pull-ups assigned to port pins 6 and 7. The resulting pin values are read back
pd,max
and t
pd
pd,min
through the synchronizer is 1 system clock period.
INSTRUCTIONS
INSTRUCTIONS
Synchronization when Reading an Externally Applied Pin value
SYSTEM CLK
SYNC LATCH
Synchronization when Reading a Software Assigned Pin Value
SYSTEM CLK
SYNC LATCH
, a single signal transition on the pin will be delayed between ½ and 1½ system clock
PINxn
PINxn
r17
r16
r17
out PORTx, r16
XXX
t
pd, max
0x00
0x00
XXX
nop
t
pd
t
0xFF
pd, min
in r17, PINx
in r17, PINx
AT90PWM81
0xFF
0xFF
Figure
69