at90pwm81-16se ATMEL Corporation, at90pwm81-16se Datasheet - Page 200

• Manufacturer Part Number: at90pwm81-16se
• Description: 8-bit Avr Microcontroller With 8k Bytes In- System Programmable Flash
• Manufacturer: ATMEL Corporation

17.4.4
200
AT90PWM81
Analog Comparator n Extended Control Register – ACnECON
Bit
Read/Write
Initial Value
• Bit 7..6– Reserved
• Bit 5– AC1OI: Analog Comparator n Output Invert
Set this bit to invert the analog comparator n output .
Clear this bit to keep the analog comparator n output .
• Bit 4– AC1OE: Analog Comparator n Output Enable
Set this bit to enable the analog comparator n output pin.
Clear this bit to disable the analog comparator n output pin.
• Bit 3 – AC1ICE: Analog Comparator 1 Interrupt Capture Enable bit
Set this bit to enable the input capture of the Timer/Counter1 on the analog comparator event. The com-
parator output is in this case directly connected to the input capture front-end logic, making the
comparator utilize the noise canceler and edge select features of the Timer/Counter1 Input Capture inter-
rupt. To make the comparator trigger the Timer/Counter1 Input Capture interrupt, the ICIE1 bit in the
Timer Interrupt Mask Register (TIMSK1) must be set.
In case ICES1 bit
edge of AC3O is the capture/trigger event of the Timer/Counter1, in case ICES1 is set to zero, it is the
falling edge which is taken into account.
Clear this bit to disable this function. In this case, no connection between the Analog Comparator and the
input capture function exists
• Bit 2, 1, 0– ACnH2, ACnH1, ACnH0: Analog Comparator n Hysteresis select
These 3 bits determine the hysteresis value of the analog comparator
The different setting are shown in
Table 17-7.
AC1M2
0
0
0
0
1
1
1
1
7
0
Analog Comparator n Hysteresis selection
AC1M1
0
0
1
1
0
0
1
1
(“Timer/Counter1 Control Register B – TCCR1B” on page
6
0
AC1M0
0
1
0
1
0
1
0
1
Table
5
ACnOI
R/W
0
17-7.
4
ACnOE
R/W
0
Description
No Hysteresis
Hysteresis + 25 mV
Hysteresis - 25 mV
Hysteresis +- 25 mV
Hysteresis + 10 mV
Hysteresis - 10 mV
Hysteresis +- 10 mV
Reserved
3
AC1ICE
R/W
0
2
ACnH2
R/W
0
1
ACnH1
R/W
0
96) is set high, the rising
0
ACnH0
R/W
0
7734M–AVR–03/10
ACnECON