at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 384

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at91sam9260-cj

Manufacturer Part Number
at91sam9260-cj
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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• DLYBCT: Delay Between Consecutive Transfers
This field defines the delay between two consecutive transfers with the same peripheral without removing the chip select.
The delay is always inserted after each transfer and before removing the chip select if needed.
When DLYBCT equals zero, no delay between consecutive transfers is inserted and the clock keeps its duty cycle over the
character transfers.
Otherwise, the following equation determines the delay:
6221G–ATARM–31-Jan-08
Delay Between Consecutive Transfers
=
32
----------------------------------- -
×
MCK
DLYBCT
AT91SAM9260
384

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