at91sam9260-cj ATMEL Corporation, at91sam9260-cj Datasheet - Page 438

• Manufacturer Part Number: at91sam9260-cj
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 32-10. Synchronous Mode Character Reception
32.6.3.4
Figure 32-11. Receiver Status
6221G–ATARM–31-Jan-08
Baud Rate
US_RHR
RXRDY
US_CR
OVRE
Clock
Read
Write
Receiver Operations
RXD
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
Clock
Start
RXD
Bit
D0
When a character reception is completed, it is transferred to the Receive Holding Register
(US_RHR) and the RXRDY bit in the Status Register (US_CSR) rises. If a character is com-
pleted while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last character is
transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit at 1.
D1
Start
D2
D3
D4
D0
D5
D6
D1
D7
Parity
Bit
D2
Stop
Bit
Start
Bit
D3
D0
D4
D1
D2
D5
D3
D4
D6
D5
D6
D7
D7
Parity
Bit
Parity Bit
Stop
Bit
AT91SAM9260
RSTSTA = 1
Stop Bit
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