z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 163
z8fmc16100
Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8FMC16100.pdf
(381 pages)
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PS024611-0408
Table 83. SPI Clock Phase and Clock Polarity Operation
Transfer Format Phase Equals Zero
Figure 25
The two SCK waveforms show polarity with CLKPOL reset to 0 and with CLKPOL set to
1. The diagram can be interpreted as either a master or slave timing diagram because the
SCK Master-In/Slave-Out (MISO) and Master-Out/Slave-In (MOSI) pins are directly
connected between the master and the slave.
Input Sample Time
PHASE
(CLKPOL = 0)
(CLKPOL = 1)
0
0
1
1
displays the timing diagram for an SPI transfer in which
MOSI
MISO
SCK
SCK
SS
CLKPOL
0
1
0
1
Figure 25. SPI Timing When Phase is 0
Bit 7
Bit 7
Bit 6
Bit 6
SCK Transmit
Falling
Falling
Rising
Rising
Edge
Bit 5
Bit 5
Bit 4
Bit 4
Z8FMC16100 Series Flash MCU
SCK Receive
Bit 3
Bit 3
SPI Clock Phase and Polarity Control
Falling
Falling
Rising
Rising
Edge
Bit 2
Bit 2
Product Specification
PHASE
Bit 1
Bit 1
is cleared to 0.
SCK Idle
Bit 0
Bit 0
State
High
High
Low
Low
151
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