w77e58 Winbond Electronics Corp America, w77e58 Datasheet - Page 17

• Manufacturer Part Number: w77e58
• Description: 8 Bit Microcontroller
• Manufacturer: Winbond Electronics Corp America

PORT 1
P1.7-0: General purpose I/O port. Most instructions will read the port pins in case of a port read
EXTERNAL INTERRUPT FLAG
IE5: External Interrupt 5 flag. Set by hardware when a falling edge is detected on INT5 .
IE4: External Interrupt 4 flag. Set by hardware when a rising edge is detected on INT4.
IE3: External Interrupt 3 flag. Set by hardware when a falling edge is detected on INT3 .
IE2: External Interrupt 2 flag. Set by hardware when a rising edge is detected on INT2.
XT/ RG : Crystal/RC Oscillator Select. Setting this bit selects crystal or external clock as system clock
RGMD: RC Mode Status. This bit indicates the current clock source of microcontroller. When cleared,
RGSL: RC Oscillator Select. This bit selects the clock source following a resume from Power Down
access, however in case of read-modify-write instructions, the port latch is read. Some pins
also have alternate input or output functions. This alternate functions are described below:
P1.0 : T2
P1.1 : T2EX
P1.2 : RXD1
P1.3 : TXD1
P1.4 : INT2
P1.5 : INT3
P1.6 : INT4
P1.7 : INT5
source. Clearing this bit selects the on-chip RC oscillator as clock source. XTUP(STATUS.4)
must be set to 1 and XTOFF (PMR.3) must be cleared before this bit can be set. Attempts to
set this bit without obeying these conditions will be ignored. This bit is set to 1 after a power-
on reset and unchanged by other forms of reset.
CPU is operating from the external crystal or oscillator. When set, CPU is operating from the
on-chip RC oscillator. This bit is cleared to 0 after a power-on reset and unchanged by other
forms of reset.
Mode. Setting this bit allows device operating from RC oscillator when a resume from Power
Down Mode. When this bit is cleared, the device will hold operation until the crystal oscillator
has warmed-up following a resume from Power Down Mode. This bit is cleared to 0 after a
power-on reset and unchanged by other forms of reset.
Mnemonic: P1
Mnemonic: EXIF
Bit:
Bit:
External I/O for Timer/Counter 2
Timer/Counter 2 Capture/Reload Trigger
Serial Port 1 Receive
Serial Port 1 Transmit
External Interrupt 2
External Interrupt 3
External Interrupt 4
External Interrupt 5
P1.7
IE5
7
7
P1.6
IE4
6
6
P1.5
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IE3
5
5
P1.4
IE2
4
4
XT/ RG
Preliminary W77E58
Publication Release Date: March 1999
P1.3
3
3
Address: 90h
Address: 91h
RGMD
P1.2
2
2
RGSL
P1.1
1
1
Revision A1
P1.0
0
0
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