w77e58 Winbond Electronics Corp America, w77e58 Datasheet - Page 63

• Manufacturer Part Number: w77e58
• Description: 8 Bit Microcontroller
• Manufacturer: Winbond Electronics Corp America

RWT: WDCON.0 - Reset Watchdog Timer. This bit is used to clear the Watchdog timer and to
CLOCK CONTROL
WD1, WD0: CKCON.7, CKCON.6 - Watchdog Timer Mode select bits. These two bits select the time-
The default Watchdog time-out is 2
and RWT bits are protected by the Timed Access procedure. This prevents software from accidentally
enabling or disabling the watchdog timer. More importantly, it makes it highly improbable that errant
code can enable or disable the watchdog timer.
SERIAL PORT
Serial port in the W77E58 is a full duplex port. The W77E58 provides the user with additional features
such as the Frame Error Detection and the Automatic Address Recognition. The serial ports are
capable of synchronous as well as asynchronous communication. In Synchronous mode the W77E58
generates the clock and operates in a half duplex mode. In the asynchronous mode, full duplex
operation is available. This means that it can simultaneously transmit and receive data. The transmit
register and the receive buffer are both addressed as SBUF Special Function Register. However any
write to SBUF will be to the transmit register, while a read from SBUF will be from the receive buffer
register. The serial port can operate in four different modes as described below.
MODE 0
This mode provides synchronous communication with external devices. In this mode serial data is
transmitted and received on the RXD line. TXD is used to transmit the shift clock. The TxD clock is
provided by the W77E58 whether the device is transmitting or receiving. This mode is therefore a half
duplex mode of serial communication. In this mode, 8 bits are transmitted or received per frame. The
LSB is transmitted/received first. The baud rate is fixed at 1/12 or 1/4 of the oscillator frequency. This
baud rate is determined by the SM2 bit (SCON.5). When this bit is set to 0, then the serial port runs at
1/12 of the clock. When set to 1, the serial port runs at 1/4 of the clock. This additional facility of
programmable baud rate in mode 0 is the only difference between the standard 8051 and the
W77E58.
The functional block diagram is shown below. Data enters and leaves the Serial port on the RxD line.
The TxD line is used to output the shift clock. The shift clock is used to shift data into and out of the
W77E58 and the device at the other end of the line. Any instruction that causes a write to SBUF will
start the transmission. The shift clock will be activated and data will be shifted out on the RxD pin till
all 8 bits are transmitted. If SM2 = 1, then the data on RxD will appear 1 clock period before the
falling edge of shift clock on TxD. The clock on TxD then remains low for 2 clock periods, and then
goes high again. If SM2 = 0, the data on RxD will appear 3 clock periods before the falling edge of
shift clock on TxD. The clock on TxD then remains low for 6 clock periods, and then goes high again.
This ensures that at the receiving end the data on RxD line can either be clocked on the rising edge
of the shift clock on TxD or latched when the TxD clock is low.
restart it. This bit is self-clearing, so after the software writes 1 to it the hardware will
automatically clear it. If the Watchdog timer reset is enabled, then the RWT has to be set by
the user within 512 clocks of the time-out. If this is not done then a Watchdog timer reset will
occur.
out interval for the watchdog timer. The reset time is 512 clock longer than the interrupt
time-out value.
17
clocks, which is the shortest time-out period. The EWT, WDIF
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Preliminary W77E58
Publication Release Date: March 1999
Revision A1