w77e58 Winbond Electronics Corp America, w77e58 Datasheet - Page 61
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w77e58
Manufacturer Part Number
w77e58
Description
8 Bit Microcontroller
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W77E58.pdf
(85 pages)
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The Watchdog timer should first be restarted by using RWT. This ensures that the timer starts from a
known state. The RWT bit is used to restart the watchdog timer. This bit is self clearing, i.e. after
writing a 1 to this bit the software will automatically clear it. The watchdog timer will now count clock
cycles. The time-out interval is selected by the two bits WD1 and WD0 (CKCON.7 and CKCON.6).
When the selected time-out occurs, the Watchdog interrupt flag WDIF (WDCON.3) is set. After the
time-out has occurred, the watchdog timer waits for an additional 512 clock cycles. If the Watchdog
Reset EWT (WDCON.1) is enabled, then 512 clocks after the time-out, if there is no RWT, a system
reset due to Watchdog timer will occur. This will last for two machine cycles, and the Watchdog timer
reset flag WTRF (WDCON.2) will be set. This indicates to the software that the watchdog was the
cause of the reset.
When used as a simple timer, the reset and interrupt functions are disabled. The timer will set the
WDIF flag each time the timer completes the selected time interval. The WDIF flag is polled to detect
a time-out and the RWT allows software to restart the timer. The Watchdog timer can also be used as
a very long timer. The interrupt feature is enabled in this case. Every time the time-out occurs an
interrupt will occur if the global interrupt enable EA is set.
div. by 4
div. by 64
div. by 1024 osc/256
RWT (WDCON.0)
Mode
Reset Watchdog
Clock Source
osc/1
osc/16
input
0
17
20
23
19
22
25
16
00
01
10
11
Figure 19. Watchdog Timer
Enable Watchdog timer reset
WD1,WD0
Time-out
- 61 -
EWT(WDCON.1)
EWDI(EIE.4)
512 clock
WDIF
Preliminary W77E58
delay
Publication Release Date: March 1999
WTRF
Interrupt
Revision A1
Reset