tc59lm818dmg TOSHIBA Semiconductor CORPORATION, tc59lm818dmg Datasheet - Page 35
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tc59lm818dmg
Manufacturer Part Number
tc59lm818dmg
Description
288mbits Network Fcram2 ? 4,194,304-words ? 4 Banks ? 18-bits
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TC59LM818DMG.pdf
(57 pages)
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Price
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Part Number:
tc59lm818dmg-33
Manufacturer:
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Unidirectional DS/QS mode
Unidirectional DS/Free Running QS mode
Bank Add.
Command
BL = 2
BL = 4
BL = 2
BL = 4
Address
(output)
(output)
(output)
(output)
MULTIPLE BANK WRITE TIMING (CL = 5)
(input)
(input)
(input)
(input)
(input)
(input)
(input)
(input)
CLK
CLK
QS
DQ
QS
DQ
QS
DQ
QS
DQ
DS
DS
DS
DS
Note: l
WRA
Bank
UA
"a"
0
I
RBD
Low
Low
RC
= 2 cycles
LAL
LA
to the same bank must be satisfied.
1
I
RC
WRA
Bank
UA
"b"
(Bank"a") = 6 cycles
2
WL = 4
WL = 4
WL = 4
WL = 4
LAL
LA
3
I
RC
(Bank"b") = 6 cycles
4
DESL
WL = 4
WL = 4
WL = 4
WL = 4
Da0Da1
Da0Da1Da2Da3Db0Db1Db2Db3
Da0Da1
Da0Da1Da2Da3Db0Db1Db2Db3
5
I
WRA
Bank
RBD
UA
"a"
6
= 2 cycles I
LAL
Db0Db1
Db0Db1
LA
7
WRA
Bank
UA
"b"
8
RBD
= 2 cycles I
LAL
LA
9
WRA
Bank
UA
"c"
10
TC59LM818DMG-33,-40
RBD
LAL
Da0Da1 Da2 Da3 Db0 Db1 Db2Db3Dc0 Dc1
Da0Da1 Da2 Da3 Db0 Db1 Db2Db3Dc0 Dc1
Da0Da1
Da0Da1
= 2 cycles I
LA
11
WRA
Bank
UA
"d"
12
2005-10-19 35/57
RBD
LAL
Db0 Db1
Db0 Db1
13
LA
= 2 cycles
WRA
Bank
UA
"a"
14
Rev 1.4
LAL
Dc0Dc1
Dc0Dc1
LA
15
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