tc59lm818dmg TOSHIBA Semiconductor CORPORATION, tc59lm818dmg Datasheet - Page 43
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tc59lm818dmg
Manufacturer Part Number
tc59lm818dmg
Description
288mbits Network Fcram2 ? 4,194,304-words ? 4 Banks ? 18-bits
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TC59LM818DMG.pdf
(57 pages)
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Price
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Part Number:
tc59lm818dmg-33
Manufacturer:
TOSHIBA
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15 405
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Unidirectional DS/QS mode
Unidirectional DS/Free Running QS mode
Command
BA0, BA1
A14~A0
(output)
(output)
MODE REGISTER SET TIMING (CL = 4, BL = 4)
(input)
(input)
(input)
(input)
From Write operation to Mode Register Set operation.
CLK
CLK
DQ
DQ
DS
QS
DS
QS
Note: Minimum delay from LAL following WRA to RDA of MRS operation is WL+BL/2.
WRA
UA
BA
0
Low
LAL
LA
1
2
WL+BL/2
3
DESL
D0 D1 D2 D3
D0 D1 D2 D3
4
5
RDA
6
(opcode)
BA0="0"
BA1="0"
MRS
Valid
7
8
9
I
RSC
10
TC59LM818DMG-33,-40
DESL
= 7 cycles
11
12
2005-10-19 43/57
13
WRA
RDA
UA
BA
14
or
Rev 1.4
LAL
LA
15
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