xr16v2652il32 Exar Corporation, xr16v2652il32 Datasheet - Page 15

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xr16v2652il32

Manufacturer Part Number
xr16v2652il32
Description
High Performance Duart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet
REV. 1.0.2
Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control
features is enabled to fit specific application requirement (see
If using the Auto RTS interrupt:
The V2652 has a new feature that provides flow control trigger hysteresis while maintaining compatibility with
the XR16C850, ST16C650A and ST16C550 family of UARTs. With the Auto RTS function enabled, an interrupt
is generated when the receive FIFO reaches the selected RX trigger level. The RTS# pin will not be forced
HIGH (RTS off) until the receive FIFO reaches one trigger level above the selected trigger level in the trigger
table
trigger level. Under the above described conditions, the V2652 will continue to accept data until the receive
FIFO gets full. The Auto RTS function is initiated when the RTS# output pin is asserted LOW (RTS On).
Automatic CTS flow control is used to prevent data overrun to the remote receiver FIFO. The CTS# input is
monitored to suspend/restart the local transmitter. The auto CTS flow control feature is selected to fit specific
application requirement (see
If using the Auto CTS interrupt:
2.13
2.14
2.15
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting RTS# output pin (MCR bit-1 to logic 1 after it is enabled).
Enable RTS interrupt through IER bit-6 (after setting EFR bit-4). The UART issues an interrupt when the
RTS# pin makes a transition from low to high: ISR bit-5 will be set to logic 1.
Enable auto CTS flow control using EFR bit-7.
Enable CTS interrupt through IER bit-7 (after setting EFR bit-4). The UART issues an interrupt when the
CTS# pin is de-asserted (HIGH): ISR bit-5 will be set to 1, and UART will suspend transmission as soon as
the stop bit of the character in process is shifted out. Transmission is resumed after the CTS# input is re-
asserted (LOW), indicating more data may be sent.
R
(Table
X
Auto RTS (Hardware) Flow Control
T
Auto RTS Hysteresis
Auto CTS Flow Control
RIGGER
11). The RTS# pin will return LOW after the RX FIFO is unloaded to one level below the selected
16
24
28
8
L
EVEL
Figure
T
ABLE
INT P
10):
6: A
IN
A
16
24
28
8
UTO
CTIVATION
RTS (H
ARDWARE
15
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
RTS# D
(C
HARACTERS IN
Figure
) F
EASSERTED
LOW
16
24
28
28
10):
C
ONTROL
R
X
(H
FIFO)
IGH
)
(C
RTS# A
HARACTERS IN
SSERTED
XR16V2652
16
24
0
8
R
X
(L
FIFO)
OW
)

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