xr16v2652il32 Exar Corporation, xr16v2652il32 Datasheet - Page 47

• Manufacturer Part Number: xr16v2652il32
• Description: High Performance Duart With 32-byte Fifo
• Manufacturer: Exar Corporation

REV. 1.0.2
GENERAL DESCRIPTION................................................................................................ 1
PIN DESCRIPTIONS ........................................................................................................ 3
1.0 PRODUCT DESCRIPTION ...................................................................................................................... 6
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................. 7
3.0 UART INTERNAL REGISTERS............................................................................................................. 21
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................. 23
A
F
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE ................................................................................................................................................ 7
2.2 5-VOLT TOLERANT INPUTS .............................................................................................................................. 7
2.3 DEVICE RESET ................................................................................................................................................... 7
2.4 DEVICE IDENTIFICATION AND REVISION ....................................................................................................... 7
2.5 CHANNEL A AND B SELECTION ...................................................................................................................... 7
2.6 CHANNEL A AND B INTERNAL REGISTERS ................................................................................................... 8
2.7 DMA MODE ......................................................................................................................................................... 8
2.8 INTA AND INTB OUTPUTS................................................................................................................................. 9
2.9 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT................................................................................ 9
2.10 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR ......................................... 10
2.11 TRANSMITTER................................................................................................................................................ 12
2.12 RECEIVER ....................................................................................................................................................... 13
2.13 AUTO RTS (HARDWARE) FLOW CONTROL ................................................................................................ 15
2.14 AUTO RTS HYSTERESIS .............................................................................................................................. 15
2.15 AUTO CTS FLOW CONTROL........................................................................................................................ 15
2.16 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 17
2.17 SPECIAL CHARACTER DETECT.................................................................................................................. 17
2.18 INFRARED MODE .......................................................................................................................................... 18
2.19 SLEEP MODE WITH AUTO WAKE-UP ......................................................................................................... 19
2.20 INTERNAL LOOPBACK................................................................................................................................. 20
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY .................................................................................. 23
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................... 23
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ................................................................................ 23
F
F
F
T
T
T
T
F
F
T
F
F
F
F
T
F
T
F
F
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
2.11.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY......................................................................................... 12
2.11.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................. 12
2.11.3 TRANSMITTER OPERATION IN FIFO MODE ........................................................................................................... 12
2.12.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 13
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 23
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION.................................................................. 24
1: C
2: TXRDY#
3: INTA
4: INTA
5: T
6: A
7: A
8: UART CHANNEL A AND B UART INTERNAL REGISTERS ...................................................................................... 21
9: INTERNAL REGISTERS DESCRIPTION. S
1. XR16V2652 B
2. P
3. XR16V2652 D
4. T
5. B
6. T
7. T
8. R
9. R
10. A
11. I
12. I
.................................................................................................................................................... 1
YPICAL DATA RATES WITH A
HANNEL
UTO
UTO
YPICAL
RANSMITTER
RANSMITTER
IN
AUD
ECEIVER
ECEIVER
NFRARED
NFRARED
UTO
.............................................................................................................................................. 1
O
AND
AND
RTS (H
X
UT
R
ON
RTS
ATE
A
AND
C
A
INTB P
INTB P
/X
RYSTAL
SSIGNMENT
O
O
AND
OFF
T
T
G
PERATION IN NON
PERATION IN
ARDWARE
AND
RANSMIT
RANSMIT
RXRDY# O
ENERATOR
O
O
LOCK
ATA
............................................................................................................................... 2
B S
PERATION IN NON
PERATION IN
(S
INS
IN
CTS F
C
OFTWARE
B
ELECT
O
ONNECTIONS
D
US
O
PERATION
..................................................................................................................................................... 2
IAGRAM
D
D
) F
PERATION FOR
ATA
ATA
I
LOW
NTERCONNECTIONS
............................................................................................................................................... 11
FIFO
UTPUTS IN
LOW
............................................................................................................................................... 8
24 MH
) F
E
E
FIFO
C
-FIFO M
NCODING AND
NCODING AND
......................................................................................................................................... 1
C
LOW
ONTROL
AND
TABLE OF CONTENTS
F
ONTROL
OR
-FIFO M
.................................................................................................................................... 9
Z CRYSTAL OR EXTERNAL CLOCK AT
AND
C
A
FIFO
R
UTO
ONTROL
T
ODE
ECEIVER
RANSMITTER
O
F
........................................................................................................................ 15
LOW
PERATION
ODE
AND
RTS F
.................................................................................................................... 14
R
R
................................................................................................................... 7
HADED BITS ARE ENABLED WHEN
ECEIVE
ECEIVE
C
.............................................................................................................. 12
............................................................................................................... 17
DMA M
ONTROL
............................................................................................................... 9
LOW
....................................................................................................... 16
........................................................................................................ 9
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
I
D
D
C
ODE
ATA
ATA
ONTROL
M
ODE
D
D
............................................................................................. 8
ECODING
ECODING
..................................................................................... 13
M
ODE
16X S
.......................................................................... 18
.......................................................................... 20
......................................................................... 14
AMPLING
EFR B
IT
................................................... 11
-4=1 ......................................... 22
XR16V2652