xr16v2652il32 Exar Corporation, xr16v2652il32 Datasheet - Page 35

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xr16v2652il32

Manufacturer Part Number
xr16v2652il32
Description
High Performance Duart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet
REV. 1.0.2
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated when the receive FIFO is filled to the programmed trigger level and
RTS de-asserts HIGH at the next upper trigger level or hysteresis level. RTS# will return LOW when FIFO data
falls below the next lower trigger level. The RTS# output must be asserted (LOW) before the auto RTS can
take effect. RTS# pin will function as a general purpose output when hardware flow control is disabled.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see
4.15.1
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts HIGH.
Data transmission resumes when CTS# returns LOW.
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
Table
7.
35
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
XR16V2652

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