xr16l2552im Exar Corporation, xr16l2552im Datasheet - Page 17

• Manufacturer Part Number: xr16l2552im
• Description: Industry Smallest Package Uart With 2.25v To 5.5v Operation
• Manufacturer: Exar Corporation

xr
REV. 1.1.1
When software flow control is enabled
characters with the programmed Xon or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed values, the L2552 will halt transmission (TX) as soon as the current character has completed
transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the interrupt output
pin will be activated. Following a suspension due to a match of the Xoff character, the L2552 will monitor the
receive data stream for a match to the Xon-1,2 character. If a match is found, the L2552 will resume operation
and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon/Xoff 8-bit flow control registers to a logic 0. Following reset the user
can write any Xon/Xoff value desired for software flow control. Different conditions can be set to detect Xon/
Xoff characters
selected, the L2552 compares two consecutive receive characters with two software flow control 8-bit values
(Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control
mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the L2552 automatically
sends an Xoff message (when enabled) via the serial TX output to the remote modem. The L2552 sends the
Xoff-1,2 characters two-character-times (= time taken to send two characters at the programmed baud rate)
after the receive FIFO crosses the programmed trigger level. To clear this condition, the L2552 will transmit the
programmed Xon-1,2 characters as soon as receive FIFO is less than one trigger level below the programmed
trigger level. See
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data.
The L2552 compares each incoming receive character with Xoff-2 data. If a match exists, the received data will
be transferred to FIFO and ISR bit-4 will be set to indicate detection of special character. Although the Internal
Register Table shows Xon, Xoff Registers with eight bits of character information, the actual number of bits is
dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the number of
character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1 also
determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds with the LSB bit for the receive character.
characters); for example, after 2.083ms has elapsed for 9600 baud and 8-bit word length, no parity and 1 stop bit setting.
2.16
2.17
RX T
Auto Xon/Xoff (Software) Flow Control
RIGGER
Special Character Detect
14
1
4
8
L
(See Table
EVEL
Table 6
INT P
below.
12) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters are
T
ABLE
IN
A
14
1
4
8
CTIVATION
6: A
(See Table
UTO
X
ON
X
/X
(
OFF
CHARACTERS IN RX FIFO
OFF
12), the L2552 compares one or two sequential receive data
C
17
(S
HARACTER
OFTWARE
14*
1*
4*
8*
(
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
S
) S
) F
ENT
LOW
)
C
ONTROL
X
(
CHARACTERS IN RX FIFO
ON
C
HARACTER
0
1
4
8
(
S
XR16L2552
) S
ENT
)