xr16l2552im Exar Corporation, xr16l2552im Datasheet - Page 22

• Manufacturer Part Number: xr16l2552im
• Description: Industry Smallest Package Uart With 2.25v To 5.5v Operation
• Manufacturer: Exar Corporation

XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
.
A
A2-A0
DDRESS
0 1 0
0 0 0
0 0 0
0 0 1
0 1 0
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 1
0 0 0
0 0 1
T
ABLE
DREV
N
DVID
MCR
MSR
RHR
THR
FCR
SPR
DLM
LCR
LSR
AFR
R
DLL
IER
ISR
AME
EG
8: INTERNAL REGISTERS DESCRIPTION.
RD/WR
RD/WR Divisor
RD/WR
RD/WR
RD/WR
RD/WR
RD/WR
R
W
WR
WR
RD
RD
RD
RD
RD
RD
EAD
RITE
/
RX FIFO
RX FIFO
CTS Int.
Enabled
Enable
Trigger
Enable
Global
FIFOs
B
Pres-
Rsvd
BRG
caler
Error
Input
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
CD#
IT
0/
0/
0
-7
RX FIFO
IR Mode
RTS Int.
Enabled
ENable
Enable
Trigger
Set TX
THR &
Empty
FIFOs
Break
B
Rsvd
Input
Bit-6
Bit-6
TSR
Bit-6
Bit-6
Bit-6
Bit-6
RI#
IT
0/
0/
0
-6
16C550 Compatible Registers
Baud Rate Generator Divisor
Set Par-
XonAny
Xoff Int.
Enable
Source
Empty
DSR#
B
Rsvd
Input
Bit-5
Bit-5
Bit-5
THR
Bit-5
Bit-5
Bit-5
Bit-5
INT
ity
IT
0/
0/
0/
0
0
-5
22
Lopback
Internal
Source
Enable
Enable
Sleep
Mode
Parity
Break
CTS#
B
Even
Input
Rsvd
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
INT
RX
IT
0/
0/
0
0
-4
S
HADED BITS ARE ENABLED WHEN
Modem
Control
Enable
Source
Enable
Enable
Output
Fram-
Parity
OP2#
Mode
B
Delta
Rsvd
DMA
Error
Bit-3
Bit-3
Stat.
Bit-3
CD#
Bit-3
Bit-3
Bit-3
Bit-3
INT
Int.
RX
ing
IT
0
-3
RX Line
Enable
Source
(OP1#)
RXRDY#
Reset
Parity
B
Delta
FIFO
Rsvd
Error
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Select
Bit-2
Stat.
Stop
Bits
INT
RI#
Int.
RX
TX
IT
0
-2
Baudout#
Control
Enable
Source
Length
Output
Empty
DSR#
Reset
RTS#
Word
Over-
B
FIFO
Delta
Error
Select
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
INT
run
RX
RX
TX
Int
IT
1
-1
rent Write
Enable
Source
Enable
Control
Length
Output
Ready
FIFOs
Concur-
DTR#
CTS#
B
Word
Delta
Bit-0
Bit-0
Data
Bit-0
Bit-0
Data
Bit-0
Bit-0
Bit-0
Bit-0
INT
RX
Int.
RX
EFR B
IT
0
-0
xr
IT
LCR ≠ 0xBF
LCR ≠ 0xBF
LCR ≠ 0xBF
-4=1
DLM=0x00
LCR[7] = 0
LCR[7] = 1
DLL=0x00
C
LCR[7]=1
OMMENT
REV. 1.1.1