xr16l2552im Exar Corporation, xr16l2552im Datasheet - Page 34

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xr16l2552im

Manufacturer Part Number
xr16l2552im
Description
Industry Smallest Package Uart With 2.25v To 5.5v Operation
Manufacturer
Exar Corporation
Datasheet

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XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated when the receive FIFO is filled to the programmed trigger level and
RTS de-asserts to a logic 1 at the next upper trigger level. RTS# will return to a logic 0 when FIFO data falls
below the next lower trigger level. The RTS# output must be asserted (logic 0) before the auto RTS can take
effect. RTS# pin will function as a general purpose output when hardware flow control is disabled.
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
These registers are used as the programmable software flow control characters XOFF1, XOFF2, XON1, and
XON2. For more details, see
4.17
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts to logic
1. Data transmission resumes when CTS# returns to a logic 0.
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
Table
6.
34
xr
REV. 1.1.1

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