spear-09-h022 STMicroelectronics, spear-09-h022 Datasheet - Page 47

• Manufacturer Part Number: spear-09-h022
• Description: Spear Head Arm 926, 200k Customizable Easic Gates, Large Ip Portfolio Soc
• Manufacturer: STMicroelectronics

SPEAR-09-H022
13.2
At power on the boot code is enabled from the static memory Bank0 by default; this has to
be a Flash bank memory. Moreover, at power on, the memory clock signal is 19 MHz, the
Release Deep Power-Down is 29 µs and the base address for external memories is 0.
SMI description
The main components of the SMI are two:
Figure 12. Block diagram
–
–
The SMI CLOCK PRESCALER, which sets-up the memory clock
The SMI DATA PROCESSING & CONTROL, which is the logic controlling the
transfer of the data
SPI memories
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