spear-09-h022 STMicroelectronics, spear-09-h022 Datasheet - Page 51

• Manufacturer Part Number: spear-09-h022
• Description: Spear Head Arm 926, 200k Customizable Easic Gates, Large Ip Portfolio Soc
• Manufacturer: STMicroelectronics

SPEAR-09-H022
15
15.1
15.1.1
15.1.2
USB 2.0 Host
Overview
SPEAr Head has two fully independent USB 2.0 Hosts and each one is constituted with 2
main blocks:
●
●
USB2.0PHY
The USB2.0PHY is a hard macro included in SPEAr Head. It is designed using standard
cells and custom cells. In this way has been possible to reach the max speed of USB: 480
Mbits/sec.
The macro is able to set his speed in LS / FS for USB 1.1 and in HS for USB 2.0.
UHC
The UHC is able to detect the USB speed configuration: USB 1.1 (LS / FS), USB 2.0 (HS)
via UTMI+ interface.
When the speed is detected, the controller uses 2 sub-controllers: EHCI (Enhanced Host
Controller Interface) for 2.0 configuration and OHCI (Open Host Controller Interface) for 1.1
configuration.
There is an AHB master and a slave for everyone of these controllers.
the USB2.0PHY that executes the serialization and the de-serialization and implements
the transceiver for the USB line.
the USB2.0 Host Controller (UHC). It is connected on AHB Bus and generates the
commands for USB2.0PHY in UTMI+ interface.
USB 2.0 Host
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