a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 113

no-image

a3p1000-1pqg208m

Manufacturer Part Number
a3p1000-1pqg208m
Description
Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
Manufacturer
Actel Corporation
Datasheet
Output DDR Module
Figure 2-34 • Output DDR Timing Model
Table 2-167 • Parameter Definitions
Parameter Name
t
t
t
t
t
t
t
t
DDROCLKQ
DDROCLR2Q
DDROREMCLR
DDRORECCLR
DDROSUD1
DDROSUD2
DDROHD1
DDROHD2
Data_R
(from core)
Data_F
(from core)
CLK
CLR
Clock-to-Out
Asynchronous Clear-to-Out
Clear Removal
Clear Recovery
Data Setup Data_F
Data Setup Data_R
Data Hold Data_F
Data Hold Data_R
INBUF
CLKBUF
Parameter Definition
D
C
A
B
C
B
X
X
X
X
X
X
R e v i s i o n 0
FF1
FF2
Output DDR
DDR_OUT
Military ProASIC3/EL Low Power Flash FPGAs
0
1
Measuring Nodes (from, to)
E
X
Out
OUTBUF
C, E
C, B
C, B
D, B
D, B
B, E
A, B
A, B
2- 99

Related parts for a3p1000-1pqg208m