a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 53

• Manufacturer Part Number: a3p1000-1pqg208m
• Description: Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
• Manufacturer: Actel Corporation

Table 2-42 • Duration of Short Circuit Event before Failure
Table 2-43 • I/O Input Rise Time, Fall Time, and Related I/O Reliability
Temperature
–40°C
0°C
25°C
70°C
85°C
100°C
110°C
125°C
Input Buffer
LVTTL/LVCMOS
LVDS/B-LVDS/
M-LVDS/LVPECL
*
The maximum input rise/fall time is related to the noise induced in the input buffer trace. If the noise is low, the rise
time and fall time of input buffers can be increased beyond the maximum value. The longer the rise/fall times, the
more susceptible the input signal is to the board noise. Actel recommends signal integrity evaluation/characterization
of the system to ensure that there is no excessive noise coupling into input signals.
For example, at 110°C, the short current condition would have to be sustained for more than three
months to cause a reliability concern. The I/O design does not contain any short circuit protection, but
such protection would only be needed in extremely prolonged stress conditions.
Input Rise/Fall Time (min.)
No requirement
No requirement
R e v i s i o n 0
Input Rise/Fall Time (max.)
10 ns *
10 ns *
Military ProASIC3/EL Low Power Flash FPGAs
Time before Failure
> 20 years
> 20 years
> 20 years
6 months
3 months
1 month
5 years
2 years
20 years (110°C)
10 years (100°C)
Reliability
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