a3p1000-1pqg208m Actel Corporation, a3p1000-1pqg208m Datasheet - Page 17
a3p1000-1pqg208m
Manufacturer Part Number
a3p1000-1pqg208m
Description
Fpga Proasic 3 Family 1m Gates 130nm Cmos Technology 1.5v 208-pin Pqfp
Manufacturer
Actel Corporation
Datasheet
1.A3P1000-1PQG208M.pdf
(182 pages)
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Note:
Figure 2-1 • High-Temperature Data Retention (HTR)
Table 2-3 • Overshoot and Undershoot Limits
V
2.7 V or less
3 V
3.3 V
3.6 V
Notes:
1. The duration is allowed at one out of six clock cycles. If the overshoot/undershoot occurs at one out of two cycles, the
2. This table does not provide PCI overshoot/undershoot limits.
CCI
Tj (°C)
100
105
110
115
120
125
130
135
140
145
maximum overshoot/undershoot has to be reduced by 0.15 V.
150
70
85
and VMV
HTR time is the period during which you would not expect a verify failure due to flash cell leakage.
Lifetime
102.7
20.0
43.8
15.6
12.3
HTR
(yrs)
9.7
7.7
6.2
5.0
4.0
3.3
2.7
2.2
Average VCCI–GND Overshoot or Undershoot
110
100
90
80
70
60
50
40
30
20
10
Duration as a Percentage of Clock Cycle
0
70
85 100 105 110 115 120 125 130 135 140 145 150
10%
10%
10%
10%
5%
5%
5%
5%
R e v i s i o n 0
Temperature (ºC)
Military ProASIC3/EL Low Power Flash FPGAs
Maximum Overshoot/
Undershoot (125°C)
0.72 V
0.82 V
0.72 V
0.81 V
0.69 V
0.79 V
N/A
N/A
2 -3
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