hn58v256a Renesas Electronics Corporation., hn58v256a Datasheet - Page 16

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hn58v256a

Manufacturer Part Number
hn58v256a
Description
Memory>eeprom>parallel Eeprom
Manufacturer
Renesas Electronics Corporation.
Datasheet
HN58V256A Series, HN58V257A Series
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write cycle.
Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner. Each
additional byte load cycle must be started within 30 µs from the preceding falling edge of WE or CE. When
CE or WE is high for 100 µs after data input, the EEPROM enters write mode automatically and the input
data are written into the EEPROM.
Data
Data Polling
Data
Data
Data polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read mode
during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the EEPROM is
performing a write operation.
RDY/Busy
RDY/Busy signal also allows the status of the EEPROM to be determined. The RDY/Busy signal has high
impedance except in write cycle and is lowered to V
the RDY/Busy signal changes state to high impedance.
RES
RES Signal (only the HN58V257A series)
RES
RES
When RES is low, the EEPROM cannot be read or programmed. Therefore, data can be protected by keeping
RES low when V
a latch function.
Rev.5.00, Nov. 17.2003, page 16 of 22
Busy
Busy
Busy Signal (only the HN58V257A series)
V
4-5
CC
CC
is switched. RES should be high during read and programming because it doesn't provide
Program inhibit
Read inhibit
OL
Read inhibit
after the first write signal. At the end of a write cycle,
Program inhibit

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