gs840fh32at-8i GSI Technology, gs840fh32at-8i Datasheet - Page 10

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gs840fh32at-8i

Manufacturer Part Number
gs840fh32at-8i
Description
256k X 18, 128k X 32, 128k X 36 4mb Sync Burst Srams
Manufacturer
GSI Technology
Datasheet
Notes:
1.
2.
3.
Rev: 1.08 4/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Simplified State Diagram with G
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
W
W
CW
10/22
W
CR
R
CR
R
Deselect
X
CW
W
CW
W
R
CR
First Read
Burst Read
R
GS840FH18/32/36AT-8/8.5/10/12
R
CR
X
X
© 1999, GSI Technology

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