gs840fh32at-8i GSI Technology, gs840fh32at-8i Datasheet - Page 5

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gs840fh32at-8i

Manufacturer Part Number
gs840fh32at-8i
Description
256k X 18, 128k X 32, 128k X 36 4mb Sync Burst Srams
Manufacturer
GSI Technology
Datasheet
TQFP Pin Description
Rev: 1.08 4/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
ADSP, ADSC
Symbol
V
A
E
DQP
DQP
DQP
DQP
ADV
V
DQ
DQ
DQ
LBO
V
BW
GW
DQ
DDQ
NC
0
CK
1
B
B
ZZ
B
B
E
G
DD
A
SS
, A
, E
C
D
A
B
2
A
B
D
A
B
C
D
1
3
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
In
In
In
In
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Address Strobe (Processor, Cache Controller); active low
5/22
Address field LSBs and Address Counter preset Inputs
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write—Writes all enabled bytes; active low
Linear Burst Order mode; active low
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Sleep Mode control; active high
Clock Input Signal; active high
Output driver power supply
Output Enable; active low
Chip Enable; active high
9th Data I/O Pin; Byte A
9th Data I/O Pin; Byte B
9th Data I/O Pin; Byte C
9th Data I/O Pin; Byte D
Chip Enable; active low
I/O and Core Ground
Core power supply
Address Inputs
Description
No Connect
GS840FH18/32/36AT-8/8.5/10/12
A
B
C
D
; active low
; active low
; active low
; active low
© 1999, GSI Technology

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