gs840fh32at-8i GSI Technology, gs840fh32at-8i Datasheet - Page 9

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gs840fh32at-8i

Manufacturer Part Number
gs840fh32at-8i
Description
256k X 18, 128k X 32, 128k X 36 4mb Sync Burst Srams
Manufacturer
GSI Technology
Datasheet
Notes:
1.
2.
3.
Rev: 1.08 4/2007
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.
The upper portion of the diagram assumes active use of only the Enable (E
inputs and that ADSP is tied high and ADSC is tied low.
The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs and
assumes ADSP is tied high and ADV is tied low.
X
CW
X
First Write
Burst Write
W
W
Simplified State Diagram
CW
9/22
W
CR
R
CR
R
Deselect
X
1,
E
2,
E
3
R
) and Write (B
CR
First Read
Burst Read
R
GS840FH18/32/36AT-8/8.5/10/12
R
A
, B
B
CR
, B
X
C
X
, B
D
, BW, and GW) control
© 1999, GSI Technology

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