cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 123
![no-image](/images/no-image-200.jpg)
cp3cn17
Manufacturer Part Number
cp3cn17
Description
Reprogrammable Connectivity Processor With Can Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3CN17.pdf
(220 pages)
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tomatic selection by setting the USMD bit in the UMDSL2
register and programming the USPOS register.
Serial data input on the RXD pin is shifted into the RSFT
register. On receiving the complete character, the contents
of the RSFT register are copied into the URBUF register
16
16
1
1
Sample
2
2
Generator/Checker
Figure 55. UART Asynchronous Communication
Error Detection
3
3
Control and
STARTBIT
Parity
DATABIT
4
4
Figure 54. UART Block Diagram
5
5
6
6
7
7
Transmitter
123
Receiver
8
8
System Clock
and the Receive Buffer Full bit (URBF) is set. The URBF bit
is automatically reset when software reads the character
from the URBUF register. The RSFT register is not software
accessible.
Baud Rate
Generator
9
9
Sample
Sample
Baud Clock
Baud Clock
10
10
11
11
12
12
Flow Control
13
13
Logic
14
14
15
15
16
16
DATA (LSB)
DS060
DS061
TXD
RTS
CTS
CKX
RXD
1
1
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