cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 81
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cp3cn17
Manufacturer Part Number
cp3cn17
Description
Reprogrammable Connectivity Processor With Can Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3CN17.pdf
(220 pages)
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Figure 32. Buffer Read Routine (BUFFLOCK Disabled)
The first step is only applicable if polling is used to get the
status of the receive buffer. It can be deleted for an interrupt
driven receive routine.
1. Read the status (CNSTAT) of the receive buffer. If the
status is RX_READY, no was the message received, so
exit. If the status is RX_BUSY, the copy process from
hidden receive buffer is not completed yet, so read CN-
STAT again.
If a buffer is configured to RX_READY and its interrupt
is enabled, it will generate an interrupt as soon as the
buffer has received a message and entered the
Yes
Read buffer (id/data/control)
Interrupt Entry Point
Write RX_READY
RX_OVERRUN?
RX_OVERRUN?
Clear RX_PND
Read CNSTAT
Read CNSTAT
RX_READY?
RX_BUSYx?
RX_BUSYx?
RX_FULL or
Read buffer
No
No
No
No
Exit
Yes
Yes
Yes
(optional, for information)
DS038
81
When the BUFFLOCK function is enabled (see BUFFLOCK
on page 78), it is not necessary to check for new messages
received during the read process from the buffer, as this
buffer is locked after the reception of the first valid frame. A
read from a locked receive buffer can be performed as
shown in Figure 33.
Figure 33. Buffer Read Routine (BUFFLOCK Enabled)
For simplicity only the applicable interrupt routine is shown:
15.5.3
As shown in Figure 33, a receive procedure starts as soon
as software has set the buffer from the RX_NOT_ACTIVE
state into the RX_READY state. The status section of CN-
STAT register is set from 0000b to 0010b. When a message
is received, the buffer will be RX_BUSYx during the copy
process from the hidden receive buffer into the message
buffer. Afterwards this buffer is RX_FULL. The CPU can
then read the buffer data and either reset the buffer status
to RX_READY or receive a new frame before the CPU reads
the buffer. In the second case, the buffer state will automat-
ically change to RX_OVERRUN to indicate that at least one
message was lost. During the copy process the buffer will
again be RX_BUSYx for a short time, but in this case the
2. Read the status to determine if a new message has
3. Write RX_READY into CNSTAT.
4. Read the ID/data and object control (DLC/RTR) from
5. Read the buffer status again and check it is not
6. If the buffer status is RX_FULL or RX_OVERRUN, one
7. If status is still RX_READY (as set by the CPU at step
1. Read the ID/data and object control (DLC/RTR) from
2. Write RX_READY into CNSTAT.
3. Clear interrupt pending bit and exit.
RX_FULL state (see also Interrupts on page 84). In that
case the procedure described below must be followed.
overwritten the one originally received which triggered
the interrupt.
the message buffer.
RX_BUSYx. If it is, repeat this step until RX_BUSYx
has gone away.
or more messages were copied. In that case, start over
with step 2.
2), clear interrupt pending bit and exit.
the message buffer.
RX Buffer States
Read buffer (id/data/control)
Interrupt Entry Point
Write RX_READY
Clear RX_PND
Exit
DS039
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