cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 59
![no-image](/images/no-image-200.jpg)
cp3cn17
Manufacturer Part Number
cp3cn17
Description
Reprogrammable Connectivity Processor With Can Interface
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3CN17.pdf
(220 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
cp3cn17K38
Manufacturer:
Texas Instruments
Quantity:
10 000
Company:
Part Number:
cp3cn17K38/NOPB
Manufacturer:
Texas Instruments
Quantity:
10 000
- Current page: 59 of 220
- Download datasheet (4Mb)
12.6.2
The Management Status Register (PMMR) is a byte-wide,
read/write register that provides status signals for the vari-
ous clocks. The reset value of PMSR register bits 0 to 2 de-
pend on the status of the clock sources monitored by the
PMM. The upper 5 bits are clear after reset. The format of
the register is shown below.
OLC
OMC
OHC
12.7
Switching from a higher to a lower power consumption
mode is performed by writing an appropriate value to the
Power Management Control/Status Register (PMMCR).
Switching from a lower power consumption mode to the Ac-
tive mode is usually triggered by a hardware interrupt.
7
Power Management Status Register (PMMSR)
SWITCHING BETWEEN POWER MODES
up event is detected. This bit must be set in
Idle and Halt modes.
0
1
Reserved
The Oscillating Low Frequency Clock bit indi-
cates whether the low-frequency oscillator is
producing a stable clock. When the low-fre-
quency oscillator is unavailable, the PMM will
not switch to Power Save, Idle, or Halt mode.
0
1
The Oscillating Main Clock bit indicates
whether the high-frequency oscillator is pro-
ducing a stable clock. When the high-frequen-
cy oscillator is unavailable, the PMM will not
switch to Active mode.
0
1
The Oscillating High Frequency (PLL) Clock
bit indicates whether the PLL is producing a
stable clock. Because the PMM tests the sta-
bility of the PLL clock to qualify power mode
state transitions, a stable clock is indicated
when the PLL is disabled. This removes the
stability of the PLL clock from the test when
the PLL is disabled. When the PLL is enabled
but unstable, the PMM will not switch to Active
mode.
0
1
–
–
–
–
–
–
–
–
PLL is not disabled in Power Save mode.
PLL is disabled in Power Save mode.
Low-frequency oscillator is unstable, dis-
abled, or not oscillating.
Low-frequency oscillator is available.
High-frequency oscillator is unstable, dis-
abled, or not oscillating.
High-frequency oscillator is available.
PLL is enabled but unstable.
PLL is stable or disabled (CRCTRL.PLL-
PWD = 0).
3
OHC OMC
2
1
OLC
0
59
Figure 9 shows the four power consumption modes and the
events that trigger a transition from one mode to another.
Some of the power-up transitions are based on the occur-
rence of a wake-up event. An event of this type can be either
a maskable interrupt or a non-maskable interrupt (NMI). All
of the maskable hardware wake-up events are monitored by
the Multi-Input Wake-Up (MIWU) Module, which is active in
all modes. Once a wake-up event is detected, it is latched
until an interrupt acknowledge cycle occurs or a reset is ap-
plied.
A wake-up event causes a transition to the Active mode and
restores normal clock operation, but does not start execu-
tion of the program. It is the interrupt handler associated
with the wake-up source (MIWU or NMI) that causes pro-
gram execution to resume.
12.7.1
A transition from Active mode to Power Save mode is per-
formed by writing a 1 to the PMMCR.PSM bit. The transition
to Power Save mode is either initiated immediately or at ex-
ecution of the next WAIT instruction, depending on the state
of the PMMCR.WBPSM bit.
For an immediate transition to Power Save mode (PM-
MCR.WBPSM = 0), the CPU continues to operate using the
low-frequency clock. The PMMCR.PSM bit becomes set
when the transition to the Power Save mode is completed.
For a transition at the next WAIT instruction (PM-
MCR.WBPSM = 1), the CPU continues to operate in Active
mode until it executes a WAIT instruction. At execution of
the WAIT instruction, the device enters the Power Save
mode, and the CPU waits for the next interrupt event. In this
case, the PMMCR.PSM bit becomes set when it is written,
even before the WAIT instruction is executed.
12.7.2
Entry into Idle mode is performed by writing a 1 to the PM-
MCR.IDLE bit and then executing a WAIT instruction. The
PMMCR.WBPSM bit must be set before the WAIT instruc-
tion is executed. Idle mode can be entered only from the Ac-
Note:
HW Event = MIWU wake-up or NMI
WBPSM = 1 &
HAL T = 1 &
"WAIT"
WBPSM = 1 &
IDLE = 1 &
"WAIT"
Figure 9. Power Mode State Diagram
Active Mode to Power Save Mode
Entering Idle Mode
Reset
WBPSM = 0 & PSM = 1
or
WBPSM = 1 & PSM = 1 & "WAIT"
Power Save Mode
Active Mode
Idle Mode
Halt Mode
www.national.com
HW Event
HW Event
HW Event
DS422
Related parts for cp3cn17
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![mma1270keg](/images/no-image3.png)
Part Number:
Description:
Freescale Semiconductor Technical Data
Manufacturer:
National Semiconductor Corporation
Datasheet:
![ADC12034](/images/no-image3.png)
Part Number:
Description:
Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LMX2350](/images/no-image3.png)
Part Number:
Description:
Pllatinum Tm Fractional N Rf / Integer N If Dual Low Power Frequency Synthesizer
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LMX2324](/images/no-image3.png)
Part Number:
Description:
Pllatinum? 2.0 Ghz Frequency Synthesizer For Rf Personal Communications
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LMX2301](/images/no-image3.png)
Part Number:
Description:
Pllatinumtm 160 Mhz Frequency Synthesizer For Rf Personal Communications
Manufacturer:
National Semiconductor Corporation
Datasheet:
![NDS8963](/images/no-image3.png)
Part Number:
Description:
Dual N-channel Enhancement Mode Field Effect Transistor
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM1201](/images/no-image3.png)
Part Number:
Description:
Video Amplifier System (obsolete)
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM3501TL-16](/images/no-image3.png)
Part Number:
Description:
Synchronous Step-up DC/DC Converter For White Led Applications
Manufacturer:
National Semiconductor Corporation
Datasheet:
![AD9621](/images/no-image3.png)
Part Number:
Description:
CLC420 - High Speed, Voltage Feedback op Amp, Package: Lcc, Pin Nb=20
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM2403](/images/no-image3.png)
Part Number:
Description:
Monolithic Triple 4.5 CRT Driver
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM592M](/images/no-image3.png)
Part Number:
Description:
Differential Video Amplifier
Manufacturer:
National Semiconductor Corporation
Datasheet:
![ADC10061](/images/no-image3.png)
Part Number:
Description:
ADC10061 - 10-Bit 600 NS A/D Converter With Input Multiplexer And Sample/Hold, Package: Soic Wide, Pin Nb=20
Manufacturer:
National Semiconductor Corporation
Datasheet:
![DS36277TMX](/images/no-image3.png)
Part Number:
Description:
DS36277 - Dominant Mode Multipoint Transceiver, Package: Soic Narrow, Pin Nb=8
Manufacturer:
National Semiconductor Corporation
Datasheet:
![DS3654](/images/no-image3.png)
Part Number:
Description:
Printer Solenoid Driver
Manufacturer:
National Semiconductor Corporation
Datasheet:
![DS3662](/images/no-image3.png)
Part Number:
Description:
Quad High Speed Trapezoidal Bus Transceiver
Manufacturer:
National Semiconductor Corporation
Datasheet: