msm7664 Oki Semiconductor, msm7664 Datasheet - Page 38
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msm7664
Manufacturer Part Number
msm7664
Description
Ntsc/pal Digital Video Decoder
Manufacturer
Oki Semiconductor
Datasheet
1.MSM7664.pdf
(76 pages)
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OPERATING MODE SETTING
There are two types of video mode settings.
1. External pin mode: direct setting from dedicated pins
2. Register setting mode: specification by internal register settings
These modes can be switched by the mode register MRA[0].
The reset state (default) is the external pin mode.
The following registers can be set in the external pin mode.
Note:
Pin Setting Example
NTSC, 27 MHz (ITU-RBT.601), Composite input, 8-bit (YCbCr) Output
MODE[3]
MODE[2]
MODE[1]
MODE[0]
CLKSEL
PLLSEL
INS[2:0]
GAINS[2:0]
TEST[2:0]
SCAN
M[2]
M[1]
M[0]
SLEEP
MRA[7:6]
MRA[3:1]
Pin Name
010: NTSC 4fsc cannot be set externally.
Output mode
Sampling mode
= low
= high
= low
= low
= low
= low
= low
= low
= low
= low
= low
= low
= low
= low
Condition
*000: NTSC ITU-RBT.601
001: NTSC Square Pixel 12.272727 MHz (24.545454 MHz)
010: NTSC 4fsc
100: PAL ITU-RBT.601
101: PAL Square Pixel
*01: 8 bit (YCbCr)
00: ITU-RBT.656 (SAV, EAV, blank processing)
10: ITU-RBT.601 16 bit (8 bit Y, 8 bit CbCr)
11: RGB (8 bit R, 8 bit G, 8 bit B)
HSYNC_L and VSYNC_L used for synchronization
0 : ITU-RBT.656 01 : 8-bit (YCbCr)
10 : 16-bit (Y + CbCr) 11 : RGB
0 : NTSC 1 : PAL
0 : ITU-RBT.601 1 : Square Pixel
0 : twice the pixel frequency 1 : pixel frequency
Normally set to a low level
: low = 1000001, : high = 1000011
Normally set to a low level
0 : normal operation 1 : sleep
14.31818 MHz (28.63636 MHz)
Notes
14.75 MHz (29.5 MHz)
13.5 MHz (27.0 MHz)
13.5 MHz (27.0 MHz)
PEDL7664-01
MSM7664
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