msm7664 Oki Semiconductor, msm7664 Datasheet - Page 44

• Manufacturer Part Number: msm7664
• Description: Ntsc/pal Digital Video Decoder
• Manufacturer: Oki Semiconductor

Note:
Horizontal Valid Trimmer (HVALT) Write only
Note:
¡ Semiconductor
Note:
Note:
Horizontal Sync Delay (HSDL)
Sync. Threshold level adjust (STHR) Write only
Default
Recommended Value
Default
Recommended Value
Default
Recommended Value
HSDL[7:0]
HVALT[7:4] HVALID start trimmer (¥ 2 pixels) $8 to $7 (*$0): –8 to +7 (–16 to +14 pixels)
HVALT[3:0] HVALID stop trimmer (¥ 2 pixels) $8 to $7 (*$0): –8 to +7 (–16 to +14 pixels)
STHR[7]
STHR[6:0]
Register Name
Register Name
Register Name
The HSYNC_L sync signal output position is adjusted.
HVALID start position and end position are changed.
The automatic control mode is a mode in which HSYNC is detected by automatically
tracking the input sync level and varying the threshold level. The register control mode
is a mode in which HSYNC is detected by the threshold level designated by STHR[6:0].
The MSM7664, which differs from its predecessor the MSM7662 in the sync detection
technique, enhances the synchronous detection for signals including noise in the weak
electrical field. However the margin for the sync detection is slightly worse.
The threshold level of sync signal detection is adjusted using this register. The unit of
the number of here is one determined taking 80IRE as the reference value, which is
twice the pedestal value 40IRE of the standard signal.
For example, the default setting of 0x37 is 55 in decimal and becomes 27.5IRE when
converted with respect to 40IRE.
HSYNC_L delay trimmer (¥ 1 pixel)
Auto Sync. depth
Sync. depth
HSDL[7] HSDL[6] HSDL[5] HSDL[4] HSDL[3] HSDL[2] HSDL[1] HSDL[0]
STHR[7] STHR[6] STHR[5] STHR[4] STHR[3] STHR[2] STHR[1] STHR[0]
HVALT HVALT HVALT HVALT HVALT HVALT HVALT HVALT
[7]
0
0
0
0
0
0
[6]
0
0
0
0
0
0
Write only
[5]
0
0
0
0
0
1
*0: Register control
1: Automatic control
$80 to $7F (*$00): –128 to +127 (–128 to +127
pixels)
0x0: 0 to *0xIE: 30 to 0x7F: 127
[4]
0
0
0
0
1
1
<address: $06>
<address: $04>
<address: $05>
[3]
0
0
0
0
1
0
[2]
0
0
0
0
1
1
PEDL7664-01
[1]
0
0
0
0
1
1
MSM7664
44/76
[0]
0
0
0
0
0
1