msm7664 Oki Semiconductor, msm7664 Datasheet - Page 7

• Manufacturer Part Number: msm7664
• Description: Ntsc/pal Digital Video Decoder
• Manufacturer: Oki Semiconductor

¡ Semiconductor
PIN DESCRIPTIONS (continued)
53 to 60
63 to 70
Pin
61
62
71
72
73
74
75
76
77
78
79
80
Y[7] to Y[0]
C[7] to C[0]
ODD/EVEN
HSYNC_L
VSYNC_L
Symbol
CLKX2O
HVALID
VVALID
CLKXO
CLKX2
DGND
DGND
DV
DV
DD
DD
Type
—
—
—
—
O
O
O
O
O
O
O
O
O
I
Data output
During ITU-RBT.656 output mode: YCbCr 8-bit data output
During 8-bit (YCbCr) output mode: YCbCr 8-bit data output
During 16-bit (YCbCr) output mode: Y 8-bit data output
During 24-bit RGB output mode: G 8-bit data output
Output mode is set by pin 27 or 28, or register MRA [7:6].
Digital power supply
Digital ground
Data output
During ITU-RBT.656 output mode: Hi-Z
During 8-bit (YCbCr) output mode: Hi-Z
During 16-bit (YCbCr) output mode: CbCr 8-bit data output
During 24-bit RGB output mode: R 8-bit data output
Output mode is set by pin 27 or 28, or register MRA [7:6].
Field display output
If field is odd, "H" is output.
Horizontal valid pixel timing output pin
If section is valid, "H" is output.
Vertical valid line timing output pin
If section is valid, "H" is output.
Vertical sync signal (V sync) output pin
Horizontal sync signal (H sync) output pin
Pixel clock output
During double-speed input mode (pin 42 = 0): One half of system clock
frequency is output.
During normal input mode (pin 42 = 1): The same frequency as system
clock frequency is output.
System clock output
System clock input is directly output.
Digital ground
Digital power supply
System clock input (selected by operation mode)
NTSC ITU-RBT.601
NTSC Square Pixel
NTSC 4fsc
PAL ITU-RBT.601
PAL Square Pixel
Y[7]: MSB, Y[0]: LSB
C[7]: MSB, C[0]: LSB
Normal input mode
13.5 MHz
12.272727 MHz
14.31818 MHz
13.5 MHz
14.75 MHz
Description
Double-speed input mode
27 MHz
24.545454 MHz
28.63636 MHz
27 MHz
29.5 MHz
PEDL7664-01
MSM7664
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