tea5766uk NXP Semiconductors, tea5766uk Datasheet - Page 10

• Manufacturer Part Number: tea5766uk
• Description: Tea5766uk Stereo Fm Radio + Rds
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TEA5766UK_1
Product data sheet
7.16 Standby mode
7.17 Power-on reset
7.18 RDS/RBDS demodulator
test mode the software port outputs signals according to
selected by setting bit TM of register TESTREG (see
disabled by the PUPD bits (see
With the PUPD[1:0] (power-up/power-down) bits the radio can be put in Standby mode.
Standby mode is defined as where the TEA5766UK has all supply voltages available but
the circuits are powered down via software (PUPD) or after power-on reset. The RDS part
can be turned off separately, using one of the PUPD bits. After a power-on reset or when
the TEA5766UK is in Standby mode, the TEA5766UK is still accessible via the control
interface, but takes only a limited amount of power from the supply. The software
programmable port maintains active to allow peripheral devices to be controlled. The
audio outputs are hard-muted.
In I
software (PUPD) the TEA5766UK is in Sleep mode. In this Sleep mode the TEA5766UK
is accessible via the bus, but the radio part is not active. The I
than in Standby mode.
When the supply voltages V
I/Os, the audio outputs and the reference clock input are in high-impedance state. The
power supplies can be switched on in any order.
After start-up of V
the registers will be set to their default values as shown in
effectively generated by V
high-impedance state (hard mute) and all other bits are set default according to the tables
in
Fully integrated RDS/RBDS demodulator, uses the reference frequency (32678 Hz) of the
PLL synthesizer tuning system. The RDS demodulator recovers and regenerates the
continuously transmitted RDS or RBDS data stream of the multiplex signal (MPXRDS)
and provides the signals clock (RDCL), data (RDDA) for further processing by the
integrated RDS decoder.
Section
2
C-bus mode when pin BUSEN = HIGH and the circuits are powered down via
11. To initialize the TEA5766UK all bytes have to be transferred.
CCA
and V
Rev. 01 — 22 March 2007
CCD
CCA
CCD
. Power-on reset: the audio output pins are in
, a power-on reset circuit will generate a reset pulse and
Section
and V
CCD
7.16).
are made 0 V and pin VREFDIG = HIGH, all
Table
Table
Table
19). The software port is not
VREFDIG
21. Software test mode is
12. The power-on reset is
TEA5766UK
Stereo FM radio + RDS
current is higher
© NXP B.V. 2007. All rights reserved.
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