s71jl064ha0bfw62 Advanced Micro Devices, s71jl064ha0bfw62 Datasheet - Page 70
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s71jl064ha0bfw62
Manufacturer Part Number
s71jl064ha0bfw62
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram Cmos 3.0volt-only, Simultaneous Operation Flash Memories And Static Ram/pseudo-static Ram
Manufacturer
Advanced Micro Devices
Datasheet
1.S71JL064HA0BFW62.pdf
(141 pages)
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Note: The system should recheck the toggle bit even if DQ5 = “1” because the toggle bit may stop toggling as DQ5
changes to “1.” See the subsections on DQ6 and DQ2 for more information.
70
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular
sector is actively erasing (that is, the Embedded Erase algorithm is in progress),
or whether that sector is erase-suspended. Toggle Bit II is valid after the rising
edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have
been selected for erasure. (The system may use either OE# or CE# to control the
read cycles.) But DQ2 cannot distinguish whether the sector is actively erasing or
is erase-suspended. DQ6, by comparison, indicates whether the device is actively
erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected
for erasure. Thus, both status bits are required for sector and mode information.
Refer to
7
Bit II” explains the algorithm. See also the
shows the toggle bit algorithm in flowchart form, and the section “DQ2: Toggle
Table 12
to compare outputs for DQ2 and DQ6.
No
Figure 7. Toggle Bit Algorithm
Complete, Write
Read Byte Twice
Reset Command
Program/Erase
Operation Not
Address =VA
Address =VA
Address = VA
(DQ7–DQ0)
(DQ7–DQ0)
(DQ7–DQ0)
Read Byte
Read Byte
Toggle Bit
Toggle Bit
DQ5 = 1?
= Toggle?
= Toggle?
START
S29JL064H
Yes
Yes
Yes
P r e l i m i n a r y
"DQ6: Toggle Bit
Operation Complete
No
No
Program/Erase
I" section subsection.
S71JLxxxHxx_00A1 February 25, 2004
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