kfm2g16q2a-deb8 Samsung Semiconductor, Inc., kfm2g16q2a-deb8 Datasheet - Page 142

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kfm2g16q2a-deb8

Manufacturer Part Number
kfm2g16q2a-deb8
Description
2gb Muxonenand A-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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5.4 AC Characteristics for Synchronous Burst Read
NOTE :
1) If OE is disabled at the same time or before CE is disabled, the output will go to high-z by t
2) It is the following clock of address fetch clock.
MuxOneNAND2G(KFM2G16Q2A-DEBx)
MuxOneNAND4G(KFN4G16Q2A-DEBx)
Clock
Clock Cycle
Initial Access Time
Burst Access Time Valid Clock to Output Delay
AVD Setup Time to CLK
AVD Hold Time from CLK
AVD High to OE Low
Address Setup Time to CLK
Address Hold Time from CLK
Data Hold Time from Next Clock Cycle
Output Enable to Data
CE Disable to Output & RDY High Z
OE Disable to Output High Z
CE Setup Time to CLK
CLK High or Low Time
CLK
CLK to RDY Setup Time
RDY Setup Time to CLK
CE low to RDY valid
If CE is disabled at the same time or before OE is disabled, the output will go to high-z by t
If CE and OE are disabled at the same time, the output will go to high-z by t
2)
to RDY valid
See Timing Diagrams 6.1, 6.2, 6.3, 6.4 and 6.24
Parameter
Symbol
t
t
t
t
t
CLKH/L
t
t
t
t
CLK
t
t
CEZ
OEZ
RDYO
t
t
AVDS
AVDH
AVDO
t
t
RDYA
RDYS
t
t
ACS
ACH
BDH
t
CES
CER
CLK
IAA
OE
BA
1)
1)
OEZ
- 142 -
.
t
CLK
Min
15
1
5
2
0
5
6
3
6
4
-
-
-
-
-
-
-
-
/3
66MHz
OEZ
CEZ
.
.
Max
66
70
11
20
20
15
11
11
15
-
-
-
-
-
-
-
-
-
-
Min
4.5
12
1
4
2
0
4
6
2
5
3
-
-
-
-
-
-
-
-
83MHz
FLASH MEMORY
Max
83
70
20
20
15
15
9
9
9
-
-
-
-
-
-
-
-
-
-
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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