cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 152

• Manufacturer Part Number: cx29600
• Description: Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

4.0 Registers
4.1 Memory Map
RXFRMREF (Receive Frame Reference Control Register)
The RXFRMREF register controls the receive rx8khz_n clock outputs.
RXK1 (Receive K1 Line Overhead Status Register)
The RXK1 register contains the received K1 Line Overhead byte. The K1 and K2 bytes are allocated for APS
signaling between line level entities. These bytes are defined only for the first STS-1 of the STS-3.
4-46
1-0
Bit
7
6
5
4
3
2
7-0
Bit
Default
00
0
0
0
0
0
0
Default
xxh
RXFRMREF_SEL[1:0]
hex address: 0x020
hex address: 0x02E
RXFRMAISL_DIS
RXFRMLOS_DIS
RXFRMLOL_DIS
RXFRMSEF_DIS
RXFRMLOF_DIS
RXFRMREF_DIS
Name
RxK1[1:8]
Mindspeed Technologies
Name
Prevents a LOL event from disabling the 8 kHz clock output.
Prevents a LOS event from disabling the 8 kHz clock output.
Prevents a SEF event from disabling the 8 kHz clock output.
Prevents a LOF event from disabling the 8 kHz clock output.
Prevents a AIS-L event from disabling the 8 kHz clock output.
Disables the rx8kz clock output.
Selects the mode of the rx8khz clock operation:
00—Switched 8 kHz output from the CDR. The clock will be
01—8 kHz receive frame reference output.
10—19.44 MHz clock output from the CDR.
11—8 kHz output from CDR
Receive value for the K1 Line Overhead byte.
disabled to a low level when one of the register controlled
events occur as selected by bits [7-2] of this register.
™
Description
Description
CX29600 Data Sheet
29600-DSH-001-B
CX29600