cx29600 Mindspeed Technologies, cx29600 Datasheet - Page 26

• Manufacturer Part Number: cx29600
• Description: Optiphytm - M155 Sts-3 Sonet/sdh Multiplexer
• Manufacturer: Mindspeed Technologies

1.0 Product Description
1.5 Logic Diagram
Table 1-4. Pin Definitions (2 of 17)
1-12
TxFrameIn
TxSDCC_Dat
TxLDCC_Dat
LTxSynRef
ExtRes
RxPLLClk
LSigDet
LRxClk–
LRxClk+
LRxData–
LRxData+
Pin Label
Transmit Frame
Reference Input
Transmit Data
Communications
Channel (Section)
Transmit Data
Communications
Channel (Line)
Line Transmit
Reference Sync
External Bias
Resistor
Receive PLL Clock
Line Signal Detect
Line Receive Clock
Negative
Line Receive Clock
Positive
Line Receive Input
Negative
Line Receive Input
Positive
Signal Name
Mindspeed Technologies
AE20
AE21
AF20
No.
P2
N4
N2
H2
G2
G1
H1
F1
Analog
PECL
PECL
PECL
PECL
PECL
Type
TTL
TTL
TTL
TTL
TTL
TTL
Diff
Diff
Diff
Diff
or
™
I/O
I
I
I
I
I
I
I
I
I
I
I
(1)
Transmit frame reference input
Transmit section DCC data input
Transmit line DCC data input
Local oscillator reference
External resistor connection for
receive CDR
Local oscillator reference
(19.44 MHz).
This pin is high when the LIU is
receiving a valid signal. When this
pin is low, the incoming data is
clamped to all zero’s to provide
proper detection of LOS.
155.52/622.08 line receive clock
input. An external line-rate clock
may optionally be provided on
this input to clock the
SONET/SDH receive line data
when the internal CDR is not
being used. This clock source can
be selected by bit 5 of the
CLKREC register. The clock
source have an accuracy of +/- 20
PPM. Tie this pin high through a
10K resistor if unused.
Complement of the above PECL
Line Receive Clock input. Tie this
pin low through a 10 k resistor if
unused.
SONET/SDH Line Receive Data
input.
Complement of the above PECL
Line Receive Data input.
Description
CX29600 Data Sheet
29600-DSH-001-B
CX29600