lc890561w Sanyo Semiconductor Corporation, lc890561w Datasheet - Page 10

• Manufacturer Part Number: lc890561w
• Description: Cmos Digital Audio Interface Receiver With Built-in Data Buffer Memory
• Manufacturer: Sanyo Semiconductor Corporation

7. System Reset (XMODE)
• The system operates normally when XMODE pin is set to high level after 3.0V or higher supply voltage is applied.
• After power-on, the system is reset by setting XMODE to low again.
• Make sure to reset the system after turning on the power.
8. PLL (LPF)
• It has a build-in VCO (Voltage Controlled Oscillator) and synchronizes with sampling frequencies of 32kHz,
• The lock judgment of PLL is performed by detection of preamble B, M and W.
• The lock frequency of PLL is selected by CKSEL0 and CKSEL1. However, only 256fs is selectable on the system
• LPF is pin for loop filter of PLL and connects resistor and capacitor as shown below.
44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz and 192kHz.
which input sampling frequency is over 96kHz. The proper PLL function to input over 96kHz will not be ensured
when other frequency value is selected.
C0
R0
LPF
XMODE
DV DD
C1
Figure 7.1 Reset Timing Chart
3.0V
Figure 8.1 Configuration of a Loop filter
LC890561W
220Ω
Reset state
R0
t > 200µ
t
0.1µF
C0
System operation
0.068µF
C1
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