lc890561w Sanyo Semiconductor Corporation, lc890561w Datasheet - Page 44

• Manufacturer Part Number: lc890561w
• Description: Cmos Digital Audio Interface Receiver With Built-in Data Buffer Memory
• Manufacturer: Sanyo Semiconductor Corporation

14.6.2 Read Out Register 0xE9 (First 48bit channel status data)
• For reading the register, set the CCB address as 0xE9.
• CSFLAG (DO0), ERROR (DO1), FSB0 (DO2), FSB1 (DO3), F0 (DO4), F1 (DO5) and F2 (DO6) output the status of
• The channel status bits 0 to 47 are output with LSB first.
• The channel status data after a CCB address setup is not updated.
• The latest data can be transferred by reading the falling edge of CSFLAG as the load enable signal.
• The relation between the read register and channel status data is shown below.
pin 25 (CSFLAG), pin34 (ERROR), pin26 (F0/FSB0), pin27 (F1/FSB1) and pin28 (F2) at the time of read.
Register
DO10
DO11
DO12
DO13
DO14
DO15
DO16
DO17
DO18
DO19
DO20
DO21
DO22
DO23
DO24
DO25
DO26
DO27
DO28
DO29
DO30
DO31
DO8
DO9
Table 14.4 Read register for the first 48bits of channel status data
Bit No.
Bit 10
Bit 11
Bit 12
Bit 13
Bit 14
Bit 15
Bit 16
Bit 17
Bit 18
Bit 19
Bit 20
Bit 21
Bit 22
Bit 23
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Channel number
Source number
Category code
Not defined
Application
Contents
Control
LC890561W
Register
DO32
DO33
DO34
DO35
DO36
DO37
DO38
DO39
DO40
DO41
DO42
DO43
DO44
DO45
DO46
DO47
DO48
DO49
DO50
DO51
DO52
DO53
DO54
DO55
Bit No.
Bit 24
Bit 25
Bit 26
Bit 27
Bit 28
Bit 29
Bit 30
Bit 31
Bit 32
Bit 33
Bit 34
Bit 35
Bit 36
Bit 37
Bit 38
Bit 39
Bit 41
Bit 42
Bit 43
Bit 45
Bit 46
Bit 47
Bit 40
Bit 44
Clock accuracy
Word length
Not defined
Not defined
frequency
Sampling
Contents
No8226-44/47