w65c134s Western Design Center, Inc., w65c134s Datasheet - Page 4

• Manufacturer Part Number: w65c134s
• Description: W65c134s 8-bit Microcontroller
• Manufacturer: Western Design Center, Inc.

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The W65C02S Static 8-bit Microprocessor Core
The W65C02S 8-bit microprocessor is the fully static (may be stopped when PHI2 is high or low) version of
the popular W65C02S microprocessor used in the Apple IIc and IIe personal computer systems. The
W65C02S is compatible with the NMOS 6502 used in many control applications and personal computers.
The small die size and low power consumption of the W65C02S offer an excellent choice as a cost effective
core microprocessor in one-chip microcomputers. The W65C02S instruction set is compatible with the
W65C802S and W65C816S, 16-bit microprocessors and the W65C832S, 32-bit microprocessor.
4096 x 8 ROM
The W65C134S 4096 x 8 bit Read Only Memory (ROM) usually contains the user's program instructions
and other fixed constants. These program instructions and constants are mask-programmed into the ROM
during fabrication of the W65C134S device. The W65C134S ROM is memory mapped from $F000 to
$FFFF.
192 x 8 RAM
The 192 x 8 bit Random Access Memory (RAM) contains the user program stack and is used for scratch
pad memory during system operation. This RAM is completely static in operation and requires no clock or
dynamic refresh. The data contained in RAM is read out nondestructively with the same polarity as the input
data. In order to take advantage of zero page addressing capabilities, the W65C134S RAM is assigned to
both page zero memory addresses $0040 to $00FF and to page one stack addresses $0140 to $01FF.
1.4
W 65C134S FUNCTION DESCRIPTION
0 B
Bus Control Register (BCR) at memory address $001B
The Bus Control Register (BCR) controls the various modes of I/O and external memory interface.
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
During power-up the value of BE defines the initial values of BCR0, BCR3 and BCR7, three
bits in the BCR that set up the W65C134S for In-Circuit-Emulation (ICE) or test modes.
When BE goes high after RESB goes high the BCR sets up the W65C134S for emulation.
Port 0 and 1 are the address outputs, Port 2 is the data I/O bus and RUN is the multiplexed
RUN function. (see RUN pin function description).
When BE goes high before RESB goes high, all bits in the BCR are "0".
After RESB goes high BE no longer effects the BCR register, and BCR may be written under
software control to reconfigure the W65C134S as desired.
Table 1-1 indicates how BCR7 and BE define the W65C134S configuration.
Figure 1-1 BE Timing Relative to RESB Input
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