M25PX64-SOVME6F NUMONYX [Numonyx B.V], M25PX64-SOVME6F Datasheet - Page 28

• Manufacturer Part Number: M25PX64-SOVME6F
• Description: 64-Mbit, dual I/O, 4-Kbyte subsector erase, serial flash memory with 75 MHz SPI bus interface
• Manufacturer: NUMONYX [Numonyx B.V]

Instructions
6.1
28/66
Write enable (WREN)
The write enable (WREN) instruction
The write enable latch (WEL) bit must be set prior to every page program (PP), dual input
fast program (DIFP), program OTP (POTP), write to lock register (WRLR), subsector erase
(SSE), sector erase (SE), bulk erase (BE) and write status register (WRSR) instruction.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
Write enable (WREN) instruction sequence
S
C
DQ0
DQ1
High Impedance
0
(Figure
1
2
Instruction
3
8) sets the write enable latch (WEL) bit.
4
5
6
7
AI13731
M25PX64