MSC8101UG/D FREESCALE [Freescale Semiconductor, Inc], MSC8101UG/D Datasheet - Page 49

• Manufacturer Part Number: MSC8101UG/D
• Description: Network Digital Signal Processor
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.6.4
The MSC8103 has several inputs to the reset logic:
• Power-on reset (
• External hard reset (
• External soft reset (
Asserting an external
When the external
•
•
•
•
All these reset sources are fed into the reset controller, which takes different actions depending on the source of the
reset. The reset status register indicates the last sources to cause a reset. Table 2-12 describes reset causes.
Freescale Semiconductor
Input Clock
SPLL MF Clock
Bus/Output
Serial Communications Controller
Communications Processor Module
SC140 Core
Baud Rate Generator
•
•
•
•
Power-on reset
(PORESET)
Hard reset
(HRESET)
Soft reset
(SRESET)
RSTCONF
DBREQ
HPE
BTM[0–1]
For BRG DF = 4
For BRG DF = 16 (default)
For BRG DF = 64
For BRG DF = 256
—disable (0) or enable (1) the host port (HDI16)
Name
—determines whether to operate in normal mode (0) or invoke the SC140 debug mode (1)
—boot from external memory (00) or the HDI16 (01)
—determines whether the MSC8103 is a master (0) or slave (1) device
Reset Timing
Clock
PORESET
PORESET
SRESET
PORESET
HRESET
Input/Output
Input/Output
Direction
Input
)
signal is deasserted, the MSC8103 samples several configuration pins:
)
)
causes concurrent assertion of an internal
MSC8103 Network Digital Signal Processor, Rev. 11
SPLLMFCLK
Symbol
CLKOUT
CPMCLK
BRGCLK
DSPCLK
PORESET initiates the power-on reset flow that resets all the MSC8103s and configures
various attributes of the MSC8103, including its clock mode.
The MSC8103 can detect an external assertion of HRESET only if it occurs while the
MSC8103 is not asserting reset. During HRESET, SRESET is asserted. HRESET is an open-
drain pin.
The MSC8103 can detect an external assertion of SRESET only if it occurs while the
MSC8103 is not asserting reset. SRESET is an open-drain pin.
CLKIN
BCLK
SCLK
Table 2-11.
Table 2-12.
562.5 KHz
2.25 MHz
18 MHz
18 MHz
18 MHz
35 MHz
70 MHz
72 MHz
36 MHz
9 MHz
Min
All
Reset Causes
Clock Ranges
Maximum Rated Core Frequency
Description
Max. Values for SC140 Clock Rating of:
91.67 MHz
34.38 MHz
91.67 MHz
91.67 MHz
183.3 MHz
91.67 MHz
22.91 MHz
275 MHz
5.73 MHz
1.43 MHz
275 MHz
PORESET
signal,
HRESET
300 MHz
37.5 MHz
6.25 MHz
1.56 MHz
100 MHz
100 MHz
100 MHz
200 MHz
300 MHz
100 MHz
25 MHz
, and
AC Timings
SRESET
2-9
.