MSC8101UG/D FREESCALE [Freescale Semiconductor, Inc], MSC8101UG/D Datasheet - Page 5

• Manufacturer Part Number: MSC8101UG/D
• Description: Network Digital Signal Processor
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Signals/Connections
The MSC8103 external signals are organized into functional groups, as shown in Table 1-1, Figure 1-1, and
Figure 1-2. Table 1-1 lists the functional groups, states the number of signal connections in each group, and
references the table that gives details on multiplexed signals within each group. Figure 1-1 shows MSC8103
external signals organized by function. Figure 1-2 indicates how the parallel input/output (I/O) ports signals are
multiplexed. Because the parallel I/O design supported by the MSC8103 communications processor module
(CPM) is a subset of the parallel I/O signals supported by the MPC8260 device, port pins are not numbered
sequentially.
Freescale Semiconductor
Power (V
Clock
Reset, configuration, and EOnCE
Memory controller
CPM input/output parallel ports
JTAG test access port (TAP)
Reserved (denotes connections that are always reserved)
System bus, HDI16, and interrupts
CC
, V
DD
, and GND)
Functional Group
Table 1-1.
MSC8103 Network Digital Signal Processor, Rev. 11
MSC8103
Functional Signal Groupings
Port A
Port B
Port C
Port D
Number of Signal
Connections
133
80
11
27
26
14
18
6
8
5
5
Detailed Description
Table 1-10 on page 1-33
Table 1-11 on page 1-36
Table 1-12 on page 1-36
Table 1-6 on page 1-13
Table 1-7 on page 1-16
Table 1-8 on page 1-21
Table 1-9 on page 1-24
Table 1-2 on page 1-4
Table 1-3 on page 1-4
Table 1-4 on page 1-5
Table 1-5 on page 1-7
1
1-1