A400CB10RC AMD [Advanced Micro Devices], A400CB10RC Datasheet
A400CB10RC
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A400CB10RC Summary of contents
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Am29SL400C Data Sheet The following document contains information on Spansion memory products. Although the document is marked with the name of the company that originally developed the specification, Spansion will continue to offer these products to existing customers. Continuity of ...
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DATA SHEET Am29SL400C 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory Distinctive Characteristics ■ Single power supply operation — 1.65 to 2.2 V for read, program, and erase operations — Ideal ...
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General Description The Am29SL400C is an 4Mbit, 1.8 V volt-only Flash memory organized as 524,288 bytes or 262,144 words. The device is offered in 48-pin TSOP and 48-ball FBGA packages. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) ...
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TABLE OF CONTENTS Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Product Selector Guide . . . . ...
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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range V Speed Options Standard Voltage Range V Max access time ACC Max CE# access time Max OE# access time Note: ...
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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 6 A10 WE# RESET RY/BY A17 ...
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CONNECTION DIAGRAM A6 B6 A13 A12 WE# RESET RY/BY A17 Special Handling Instructions for FBGA Packages Special handling is required for Flash Memory products ...
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PIN CONFIGURATION A0–A17 = 18 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...
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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am29SL400C T 100R E DEVICE NUMBER/DESCRIPTION Am29SL400C 4 Megabit (512 K ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the de- vice bus operations, which are initiated through the internal command register. The command register itself does not oc- cupy any addressable memory location. The register is com- ...
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The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the Unlock By- pass mode, only two write cycles are required to program a word or byte, instead of four. The Word/Byte Program Com- mand ...
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Table 2. Am29SL400CT Top Boot Block Sector Address Table Sector A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 1 1 ...
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Table 4. Am29SL400C Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29SL400C Byte L (Top Boot Block) Device ID: Word L Am29SL400C Byte L (Bottom Boot Block) Sector Protection Verification L L ...
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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 2. Temporary ...
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COMMAND DEFINITIONS Writing specific address and data commands or sequences into the command register initiates device operations. Table 5 on page 18 defines the valid register command se- quences. Writing incorrect address and data values or writing them in the ...
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Unlock Bypass Command Sequence The unlock bypass feature allows the system to program bytes or words to the device faster than using the standard program command sequence. The unlock bypass command sequence is initiated by first writing two unlock cycles. ...
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The system can monitor DQ3 to determine if the sector erase timer has timed out. (See the “DQ3: Sector Erase Timer” section.) The time-out begins from the rising edge of the final WE# pulse in the command sequence. Once the ...
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Command Definitions Table 5. Am29SL400C Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 on page 22 and the following subsections describe the functions of these bits. DQ7, RY/BY#, ...
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If the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Sus- pend mode.) If the output is high (Ready), the device is ready to read array data (including during the Erase ...
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START Read DQ7–DQ0 (Note 1) Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes (Notes Read DQ7–DQ0 1, 2) Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Program/Erase Complete, Write Operation Complete Reset Command ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to 1 when an Embedded Program or Embedded Erase operation has exceeded the ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes ...
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DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C Figure 11. Test Setup Key to Switching Waveforms WAVEFORM Don’t Care, Any Change Permitted 2.0 V 1.0 V Input 0 Test Condition Output ...
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AC CHARACTERISTICS Read Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded Algorithms READY Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# BYTE# ...
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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE Data RY/BY VCS Notes program address program data Illustration ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter Description JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written, ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 checkerboard pattern. ...
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LATCHUP CHARACTERISTICS Description Input voltage with respect all pins except I/O pins SS (including A9, OE#, and RESET#) Input voltage with respect all I/O pins SS V Current CC Includes all pins except V ...
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PHYSICAL DIMENSIONS TS048—48-Pin Standard TSOP Am29SL400C Dwg rev AA; 10/99 Am29SL400C_00_A6 January 23, 2007 ...
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PHYSICAL DIMENSIONS FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA Package January 23, 2007 Am29SL400C_00_A6 Am29SL400C Dwg rev AF; 10/99 41 ...
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REVISION SUMMARY Revision A (August 14, 2002) Initial Release. Revision A+1 (August 28, 2002) Sector Protection/Unprotection Changed beginning of second paragraph from, “The primary method....” to read, “Sector protection/unprotection.” Deleted third paragraph. FBB048—48-Ball Fine-Pitch Ball Grid Array (FBGA ...