A400CB10RC AMD [Advanced Micro Devices], A400CB10RC Datasheet - Page 20

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A400CB10RC

Manufacturer Part Number
A400CB10RC
Description
4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
Notes:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are
4. Data bits DQ15–DQ8 are don’t cares for unlock and command
5. Address bits A17–A11 are don’t cares for unlock and command
6. No unlock or command cycles required when reading array data,
7. The Reset command is required to return to reading array data
18
Read (Note 6)
Reset (Note 7)
Program
Unlock Bypass
Unlock Bypass Program (Note 10)
Unlock Bypass Reset (Note 11)
Chip Erase
Sector Erase
Erase Suspend (Note 12)
Erase Resume (Note 13)
write operations.
cycles.
cycles, unless SA or PA required.
unless SA or PA required.
when device is in the autoselect mode, or if DQ5 goes high (while
the device is providing status data).
Manufacturer ID
Device ID,
Top Boot Block
Device ID,
Bottom Boot Block
Sector Protect Verify
(Note 9)
Command
Sequence
(Note 1)
Word
Word
Word
Word
Word
Word
Word
Word
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Byte
Table 5. Am29SL400C Command Definitions
1
1
4
4
4
4
4
3
2
2
6
6
1
1
Addr
XXX
AAA
AAA
AAA
AAA
AAA
AAA
XXX
XXX
AAA
AAA
XXX
XXX
555
555
555
555
555
555
555
555
RA
First
Data
RD
AA
AA
AA
AA
AA
AA
AA
AA
D A T A
F0
A0
B0
90
30
Addr
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
555
555
555
555
555
555
555
555
PA
Am29SL400C
Second
Data
PD
S H E E T
55
55
55
55
55
55
00
55
55
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A17–A12 uniquely select any sector.
8. The fourth cycle of the autoselect command sequence is a read
9. The data is 00h for an unprotected sector and 01h for a protected
10. The Unlock Bypass command is required prior to the Unlock
11. The Unlock Bypass Reset command is required to return to
12. The system may read and program in non-erasing sectors, or
13. The Erase Resume command is valid only during the Erase Suspend
cycle.
sector.
information.
Bypass Program command.
reading array data when the device is in the unlock bypass mode.
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation.
mode.
Addr
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
555
555
555
555
555
555
555
555
Bus Cycles (Notes 2-5)
Third
See
Data
90
90
90
90
A0
20
80
80
“Autoselect Command Sequence”
Addr
(SA)
(SA)
AAA
AAA
X00
X01
X02
X01
X02
X02
X04
555
555
PA
Fourth
Am29SL400C_00_A6 January 23, 2007
XX00
XX01
Data
70h
70h
FIh
FIh
PD
AA
AA
01
00
01
Addr
2AA
2AA
555
555
Fifth
Data
55
55
for more
Addr
AAA
555
SA
Sixth
Data
10
30

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